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[23.128.96.18]) by mx.google.com with ESMTP id f29si7641532edj.297.2021.01.25.03.25.27; Mon, 25 Jan 2021 03:25:27 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KsPtTSBA; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727761AbhAYLYm (ORCPT + 6 others); Mon, 25 Jan 2021 06:24:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727738AbhAYLMm (ORCPT ); Mon, 25 Jan 2021 06:12:42 -0500 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6722EC0617AA for ; Mon, 25 Jan 2021 03:08:49 -0800 (PST) Received: by mail-wm1-x333.google.com with SMTP id i9so3925500wmq.1 for ; Mon, 25 Jan 2021 03:08:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2eRhKsVau0r7rYJc5kg9wODttGekaxkRDREYSkG2V3g=; b=KsPtTSBAe0tkUxNLmUgmnZTm9c5AfkV2YTEWV91OLlxWU6JSKf4TB8V0VJ52+PRz5M T5EtOM+4J3dfMdgyBbN7bdeDrXK6f1CJQo70cwWWD2/PdUJDA3fzcDOPJ2vYObqfF2iz xdypk+jPI41aBtU/ZlFSq13WhFnBQS9ToWK69kW6nrQMv7Nyla9UJoQMzKFheu3jHi5r 42J2XKlP8z3Virz2svl9Lpi88Feg2unVcV98HLW1m8p4U+ZKpsCGfTBD/OnfHXowYuYQ AxnygmlRoR39X1p70/TI395nERXf7alKLVOR4sbR/F+VOGSzOgjGLYQNZmWywJVK71mT JpBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2eRhKsVau0r7rYJc5kg9wODttGekaxkRDREYSkG2V3g=; b=GIwEzxPXgOoG81uSbtwauM5/gHuAJmxhuJfb9CQRQTB2ntyrfkNcBT69g4r2MHEZoD bqIbwurGVe2wUILhxbvZRvjYeP7QF1udFiWoLzJyB/FfUke9zcwHnyyka65xInlqMZIQ kLJzEpDYfszNf3glhZTRaqxz8Vlnz2CmttjSoUoa4RH6lD+n2u8clPjJ/4/aE6MDttAC fKex/VU7VUNVXJajDsUDhPAwg2hqZ94zNNPDD3IzIF4GSijARluXwm8FMLnla0MT5Zd9 tIsYH8VPM1qBvYkAd/+bxNEy4Cn/hEgFSLE0rAeCHYoBm8C9G8SR0ADiXKzz9Kb/RSm2 ildQ== X-Gm-Message-State: AOAM5335VzBhsWPAAj7f5XDMEEvrjgrilXEpmrFTlPfIGXHNzrTlE9SW CpW2xgIrn5lU9mhJSc6c0p3gkQ== X-Received: by 2002:a1c:3c04:: with SMTP id j4mr1104717wma.147.1611572928161; Mon, 25 Jan 2021 03:08:48 -0800 (PST) Received: from localhost.localdomain ([2001:1715:4e26:a7e0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id u6sm16636014wro.75.2021.01.25.03.08.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Jan 2021 03:08:47 -0800 (PST) From: Jean-Philippe Brucker To: joro@8bytes.org, will@kernel.org Cc: lorenzo.pieralisi@arm.com, robh+dt@kernel.org, guohanjun@huawei.com, sudeep.holla@arm.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, Jonathan.Cameron@huawei.com, eric.auger@redhat.com, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-accelerators@lists.ozlabs.org, baolu.lu@linux.intel.com, jacob.jun.pan@linux.intel.com, kevin.tian@intel.com, vdumpa@nvidia.com, zhangfei.gao@linaro.org, shameerali.kolothum.thodi@huawei.com, vivek.gautam@arm.com, Jean-Philippe Brucker , Arnd Bergmann , Greg Kroah-Hartman , Zhou Wang Subject: [PATCH v11 05/10] uacce: Enable IOMMU_DEV_FEAT_IOPF Date: Mon, 25 Jan 2021 12:06:46 +0100 Message-Id: <20210125110650.3232195-6-jean-philippe@linaro.org> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210125110650.3232195-1-jean-philippe@linaro.org> References: <20210125110650.3232195-1-jean-philippe@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IOPF (I/O Page Fault) feature is now enabled independently from the SVA feature, because some IOPF implementations are device-specific and do not require IOMMU support for PCIe PRI or Arm SMMU stall. Enable IOPF unconditionally when enabling SVA for now. In the future, if a device driver implementing a uacce interface doesn't need IOPF support, it will need to tell the uacce module, for example with a new flag. Acked-by: Zhangfei Gao Signed-off-by: Jean-Philippe Brucker --- Cc: Arnd Bergmann Cc: Greg Kroah-Hartman Cc: Zhangfei Gao Cc: Zhou Wang --- drivers/misc/uacce/uacce.c | 39 +++++++++++++++++++++++++++++--------- 1 file changed, 30 insertions(+), 9 deletions(-) -- 2.30.0 diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c index d07af4edfcac..6db7a98486ec 100644 --- a/drivers/misc/uacce/uacce.c +++ b/drivers/misc/uacce/uacce.c @@ -385,6 +385,33 @@ static void uacce_release(struct device *dev) kfree(uacce); } +static unsigned int uacce_enable_sva(struct device *parent, unsigned int flags) +{ + if (!(flags & UACCE_DEV_SVA)) + return flags; + + flags &= ~UACCE_DEV_SVA; + + if (iommu_dev_enable_feature(parent, IOMMU_DEV_FEAT_IOPF)) + return flags; + + if (iommu_dev_enable_feature(parent, IOMMU_DEV_FEAT_SVA)) { + iommu_dev_disable_feature(parent, IOMMU_DEV_FEAT_IOPF); + return flags; + } + + return flags | UACCE_DEV_SVA; +} + +static void uacce_disable_sva(struct uacce_device *uacce) +{ + if (!(uacce->flags & UACCE_DEV_SVA)) + return; + + iommu_dev_disable_feature(uacce->parent, IOMMU_DEV_FEAT_SVA); + iommu_dev_disable_feature(uacce->parent, IOMMU_DEV_FEAT_IOPF); +} + /** * uacce_alloc() - alloc an accelerator * @parent: pointer of uacce parent device @@ -404,11 +431,7 @@ struct uacce_device *uacce_alloc(struct device *parent, if (!uacce) return ERR_PTR(-ENOMEM); - if (flags & UACCE_DEV_SVA) { - ret = iommu_dev_enable_feature(parent, IOMMU_DEV_FEAT_SVA); - if (ret) - flags &= ~UACCE_DEV_SVA; - } + flags = uacce_enable_sva(parent, flags); uacce->parent = parent; uacce->flags = flags; @@ -432,8 +455,7 @@ struct uacce_device *uacce_alloc(struct device *parent, return uacce; err_with_uacce: - if (flags & UACCE_DEV_SVA) - iommu_dev_disable_feature(uacce->parent, IOMMU_DEV_FEAT_SVA); + uacce_disable_sva(uacce); kfree(uacce); return ERR_PTR(ret); } @@ -487,8 +509,7 @@ void uacce_remove(struct uacce_device *uacce) mutex_unlock(&uacce->queues_lock); /* disable sva now since no opened queues */ - if (uacce->flags & UACCE_DEV_SVA) - iommu_dev_disable_feature(uacce->parent, IOMMU_DEV_FEAT_SVA); + uacce_disable_sva(uacce); if (uacce->cdev) cdev_device_del(uacce->cdev, &uacce->dev);