From patchwork Fri Jan 22 16:24:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aswath Govindraju X-Patchwork-Id: 368823 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C62CC433E0 for ; Fri, 22 Jan 2021 16:25:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0A52C2343E for ; Fri, 22 Jan 2021 16:25:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729687AbhAVQZ1 (ORCPT ); Fri, 22 Jan 2021 11:25:27 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:44200 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729694AbhAVQZR (ORCPT ); Fri, 22 Jan 2021 11:25:17 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 10MGOGE3034194; Fri, 22 Jan 2021 10:24:16 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1611332656; bh=dSXJV1hTN8RWx0vzQNw7CasGpjJJ8wWLngDeuxPMTL8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LbWgAHrTU9gCttpjyvsyZPMcYISUTSTALUnkLDjU6KH4J3Ip8tdsXnKQSVNwC295J Vu+EWvUBQ5PjmPkDuZCzdC4jvZhHbwMGdcw4cWzSmNVmOx5FZxNrMXy8RBJunwwvdS 9Yza5Ko0x7KC1DOnQ1VqgKgi+5d2etRpg/+XyS+k= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 10MGOGMJ119957 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 22 Jan 2021 10:24:16 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 22 Jan 2021 10:24:15 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 22 Jan 2021 10:24:16 -0600 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 10MGO59h099178; Fri, 22 Jan 2021 10:24:11 -0600 From: Aswath Govindraju CC: Lokesh Vutla , Vignesh Raghavendra , Kishon Vijay Abraham I , Aswath Govindraju , Nishanth Menon , Tero Kristo , Rob Herring , , , Subject: [PATCH 1/2] arm64: dts: ti: k3-j7200-main: Add support for HS200 and HS400 modes in MMCSD0 subsystem Date: Fri, 22 Jan 2021 21:54:02 +0530 Message-ID: <20210122162403.20700-2-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210122162403.20700-1-a-govindraju@ti.com> References: <20210122162403.20700-1-a-govindraju@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org HS200 and HS400 modes at 1.8 V card voltage, are now supported in MMCSD0 subsystem of J7200 SoC[1]. Set respective tags to indicate it. [1] - https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf Signed-off-by: Aswath Govindraju --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 4cc2e9094d0e..03486395e492 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -517,6 +517,8 @@ ti,trm-icp = <0x8>; bus-width = <8>; mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; dma-coherent; };