From patchwork Fri Jan 15 14:03:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 364832 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5C8DC433E6 for ; Fri, 15 Jan 2021 14:07:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B1D40238A1 for ; Fri, 15 Jan 2021 14:07:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732571AbhAOOHN (ORCPT ); Fri, 15 Jan 2021 09:07:13 -0500 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:1776 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731589AbhAOOHM (ORCPT ); Fri, 15 Jan 2021 09:07:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1610719632; x=1642255632; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZVJszlCUeT8A82U+e6McWWtmRXvcdjQ3DcRByG4VQwg=; b=jLleuR1InNBWgm4rK41lm5KtZB+E4LYh6L1NDmj9ztEegGrCLQmo/XcV dW4QvVW1BAqHg4IyCiyAWxa62jz85WiJqWhq0nw5s+y6pXo6e3whh70tA 7OfSE+gLSSE/XwuDzHbJWTxhk6LYJxPJ+i8lp0hYD3psjENIjX0awQlqx rDT/mnteryuHddGZTM12nRTcnTcgY3wW5oxJzLfEoGB7A6HbHUM07NNH1 PyT9n23yKbTLFv2y6zEIveaipIclfODSUjsAJuE0mIZmOIbVrU2D1F0V9 ZLDBId3MtpKQP5bO03dx+ccJagybYyxT792RjLr9o1IjmGHIhutecANpf A==; IronPort-SDR: Ursw+WP8cs5bcKDlERhJsOoRCTMSZv2qPxBZTlv3sY84OBJJ80Dv2ANWglPzSaA6z2TFhloIxK v8z3tpAl+bYa0KVJcvCwpKYWmVvBdHyD4qZPPiLkq5BBTK4nCDkbREb+n/WqBuicdh/qBLEmeN 34pMYFtM+UAOpg6egkKMJHhK3f7jfxNklEsfE0WtKaLD5KH5IyHqfpJz7RLLGqzweSKURMZiec 8xr3gVd/EsB04W1aL6L+tLrUVJKDx26sLcBVH2AFd8STX2y7W54S6Ugif+IBvtwrafq9+P0scR E2E= X-IronPort-AV: E=Sophos;i="5.79,349,1602518400"; d="scan'208";a="158693677" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 15 Jan 2021 22:04:53 +0800 IronPort-SDR: sTa76lTDVpAbtDLA4dSx8k9KMTlnZ6KvWqo0r+lu8zBwXMI/YUtRaed6FYNkLtYfd+TTIfZBbh Vr4GlgTsymTWW55YRKpBtWw4cPmjApAj83UcnLqBq9L1KOVTTdLfB1PVwqpQI4x6JZhRMd5pza 64VqzoFxIpwfag/a/N1hLKGAnQt/29Rh9iAU7Xo3SuzxkvrrU/ZpwQupaWL7dSkzKwg9dwSB7O TjGPHmlrTG1tRmZ9z0a4OeRQ/8KJWK8OlCW/MH8B56kgr5QzK8FT36A+1tBCe9oD/Brx7IQXBo wggPAXl+QK8b0pkihMS6Qh7L Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jan 2021 05:49:34 -0800 IronPort-SDR: eaQbxlv6RWMi7NJFJJ5s2N4KgbW7Y9yRRfByajK1uH0prKj2Wjga251wCtmQKQy3GQPJCMS2mz JhlQo+X98afSYdah3pe83Yxuic2DKzBidub5f9BA785flfK/u2kYIYJnr6blopFptj9ZyVJtvM Cw//Zc2NRIJ8eJ6gf0V5tWhR2w9aRAilYLzRVPkqO2TV/d7b44sgruAraFp+CjrM1Q00rdJga3 K0caHkpwVGRgRQwTHv4JkRC9X4FIM+alP9m6l3RU3kqFQeXM1Cxj6ibf4YiilrR91AmKzqLQ6U iRE= WDCIronportException: Internal Received: from wdapacbjl0003.my.asia.wdc.com (HELO twashi.fujisawa.hgst.com) ([10.84.70.177]) by uls-op-cesaip02.wdc.com with ESMTP; 15 Jan 2021 06:04:51 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v12 11/17] riscv: Add SiPeed MAIX BiT board device tree Date: Fri, 15 Jan 2021 23:03:46 +0900 Message-Id: <20210115140352.146941-12-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210115140352.146941-1-damien.lemoal@wdc.com> References: <20210115140352.146941-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the device tree sipeed_maix_bit.dts for the SiPeed MAIX BiT and MAIX BiTm boards. This device tree enables LEDs, gpio, i2c and spi/mmc SD card devices. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal --- .../riscv/boot/dts/canaan/sipeed_maix_bit.dts | 234 ++++++++++++++++++ 1 file changed, 234 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts diff --git a/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts b/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts new file mode 100644 index 000000000000..11e491410f00 --- /dev/null +++ b/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include +#include + +/ { + model = "SiPeed MAIX BiT"; + compatible = "sipeed,maix-bit", "sipeed,maix-bitm", + "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + led0 { + color = ; + label = "green"; + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + led1 { + color = ; + label = "red"; + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + led2 { + color = ; + label = "blue"; + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-names = "default"; + pinctrl-0 = <&jtag_pinctrl>; + status = "okay"; + + jtag_pinctrl: jtag-pinmux { + pinmux = , + , + , + ; + }; + + uarths_pinctrl: uarths-pinmux { + pinmux = , + ; + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&dvp_pinctrl>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; + spi-max-frequency = <15000000>; + spi-cs-high; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +};