From patchwork Tue Dec 22 07:05:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 346615 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5095913jai; Mon, 21 Dec 2020 23:08:04 -0800 (PST) X-Google-Smtp-Source: ABdhPJxtZAloPWq4vA8Uat2UU+WPPF+6Qk4YOx95tOwEXpf21vOGHIpHU2OcBW2aDJCss6rUcZTd X-Received: by 2002:a17:906:ce23:: with SMTP id sd3mr18644702ejb.69.1608620884437; Mon, 21 Dec 2020 23:08:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1608620884; cv=none; d=google.com; s=arc-20160816; b=0S7EMIaDB/leuGdkcG2K7NWnNvDfmo0gEzw0RQvlj4RdYL9qlW3ALeW1N+NunGH22Y OPKGTVozIGFSKZ+WAT9RfmILnmZ8w2gIub1m4n5sWDS9yyB7zux/Qq+oJuUSfSheLbV2 o6rJkkeR+Zs/I52JGawf6xY+nj5rIp+Cn86XGPdgax4ihWBrZmfsILnb8lMl9IV6hCr+ VhLACYA4e3UH1bbQeNlSR0FMM7B3teSqlRwkz8kyHbFxXUkaEmOfS9MyycwHWUDI4Okm 3wQVfB2WAEDL1LYJSa2yDi1q5f8JBpM6L9xfI2GAcZHqVprweO6yHabgNn0H+IqKMXr7 EQHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=1m1jaw1QKhWt1my5TiZgSyHmcvod41lJIai7xVZR3M8=; b=BqFQh9T7FAsmGKRfo6Ve4oL9i3CfT7AsZM5oYFCBEOkkIotAcpK7ZW/IPTV9H6MHv+ Ka+zMqxWiqh79fNzHu0LfPmyJSq91F2g+iI7ZAr5lDIel525HFlrRoq5MK2hRnCwRq8J Ti6Wk4Ou9i+8PyEyS4LpZn9P/EnSMke9cnjRdGc431Zbek36i7EmHlqTt31S0dvi5PQH xjsPlNlUfDRK7w8Zu7I1m/tItruLHm8SZDfjByVbcuraBk+DlOlAp1FRH7iGbwAXKjA/ PNhs6I1llh8Nrw/rPvBWh96BebvXPF6CaRGpSrpTKle/LgN8WlwmxP4+MP9IHFDcubNu IyJQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="k2Lv/8JY"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h4si1408831edf.490.2020.12.21.23.08.04; Mon, 21 Dec 2020 23:08:04 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="k2Lv/8JY"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726555AbgLVHHe (ORCPT + 7 others); Tue, 22 Dec 2020 02:07:34 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:53952 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726475AbgLVHHd (ORCPT ); Tue, 22 Dec 2020 02:07:33 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0BM75mCP064163; Tue, 22 Dec 2020 01:05:48 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1608620748; bh=1m1jaw1QKhWt1my5TiZgSyHmcvod41lJIai7xVZR3M8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=k2Lv/8JY+DRFPatcb0Q0iwAJ7Z0JMHq5gizKtoD0pxszczmbmlqEPPt8iKmW+rg8E 5gEIglPMIe71MzlxKLEO2M/Y9ZnOYAhR7uNDQ7N9MI7u4rGLy2N7EoYKv5PsiP0Nnv 6MVh7voLFA6fnLrL2My2/AtO8xm7CYsWw8hywXQw= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0BM75mth031994 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 22 Dec 2020 01:05:48 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 22 Dec 2020 01:05:47 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 22 Dec 2020 01:05:47 -0600 Received: from a0393678-ssd.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0BM75N7F050344; Tue, 22 Dec 2020 01:05:45 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Swapnil Jakhade , , , CC: Nishanth Menon , Philipp Zabel Subject: [PATCH v2 06/14] phy: cadence: cadence-sierra: Move all clk_get_*() to a separate function Date: Tue, 22 Dec 2020 12:35:12 +0530 Message-ID: <20201222070520.28132-7-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201222070520.28132-1-kishon@ti.com> References: <20201222070520.28132-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org No functional change. Group all devm_clk_get_optional() to a separate function. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 57 +++++++++++++++--------- 1 file changed, 35 insertions(+), 22 deletions(-) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index f7ba0ed416bc..7bf1b4c7774a 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -477,6 +477,38 @@ static int cdns_regmap_init_blocks(struct cdns_sierra_phy *sp, return 0; } +static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, + struct device *dev) +{ + struct clk *clk; + int ret; + + clk = devm_clk_get_optional(dev, "phy_clk"); + if (IS_ERR(clk)) { + dev_err(dev, "failed to get clock phy_clk\n"); + return PTR_ERR(clk); + } + sp->clk = clk; + + clk = devm_clk_get_optional(dev, "cmn_refclk_dig_div"); + if (IS_ERR(clk)) { + dev_err(dev, "cmn_refclk_dig_div clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->cmn_refclk_dig_div = clk; + + clk = devm_clk_get_optional(dev, "cmn_refclk1_dig_div"); + if (IS_ERR(clk)) { + dev_err(dev, "cmn_refclk1_dig_div clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->cmn_refclk1_dig_div = clk; + + return 0; +} + static int cdns_sierra_phy_probe(struct platform_device *pdev) { struct cdns_sierra_phy *sp; @@ -487,7 +519,6 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) unsigned int id_value; int i, ret, node = 0; void __iomem *base; - struct clk *clk; struct device_node *dn = dev->of_node, *child; if (of_get_child_count(dn) == 0) @@ -524,11 +555,9 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) platform_set_drvdata(pdev, sp); - sp->clk = devm_clk_get_optional(dev, "phy_clk"); - if (IS_ERR(sp->clk)) { - dev_err(dev, "failed to get clock phy_clk\n"); - return PTR_ERR(sp->clk); - } + ret = cdns_sierra_phy_get_clocks(sp, dev); + if (ret) + return ret; sp->phy_rst = devm_reset_control_get(dev, "sierra_reset"); if (IS_ERR(sp->phy_rst)) { @@ -542,22 +571,6 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) return PTR_ERR(sp->apb_rst); } - clk = devm_clk_get_optional(dev, "cmn_refclk_dig_div"); - if (IS_ERR(clk)) { - dev_err(dev, "cmn_refclk_dig_div clock not found\n"); - ret = PTR_ERR(clk); - return ret; - } - sp->cmn_refclk_dig_div = clk; - - clk = devm_clk_get_optional(dev, "cmn_refclk1_dig_div"); - if (IS_ERR(clk)) { - dev_err(dev, "cmn_refclk1_dig_div clock not found\n"); - ret = PTR_ERR(clk); - return ret; - } - sp->cmn_refclk1_dig_div = clk; - ret = clk_prepare_enable(sp->clk); if (ret) return ret;