From patchwork Tue Dec 22 07:05:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 346611 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5095858jai; Mon, 21 Dec 2020 23:08:00 -0800 (PST) X-Google-Smtp-Source: ABdhPJzQff2PnGoP3JnPr5ldR8aU3UuG+1zhrBhSzula04QxUykL99KX85KfSzMQ1tNyh8BpVPV0 X-Received: by 2002:a05:6402:17a3:: with SMTP id j3mr19117613edy.333.1608620880294; Mon, 21 Dec 2020 23:08:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1608620880; cv=none; d=google.com; s=arc-20160816; b=v4GVWAGv13YhOGXT5reicYxfOC2RSbwqdRYxwx32uSBYlsz9C3vP2G8g04HG7xNlyi 4mxefH5/PSz63eMHVUF6bdWLmVhx0WL8Wi70nQxDw0nia2jpX8XsBUSuBXBUlYdMq5ob rkbC5HRQfEVB+FhB03WnybpA0j+xWJrOywr4vsbDSjJqyC3p/j6ZEOcgXAsA4Clhrg4O BWJRDmkWjbwQnhZzGz3pLfxqM0m8ixwmyYQJFapV27nqJKXdcRn+jdi1V8DoU2/CEtyx XmsDtumrMrmJmJDKl8uJuYVGtRiTrf5JvtJmH+sMbJ3tXdksef8h4A9TGrC58rF3q0c9 z1Qw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=vQYJz6q3QwL2K0Sik8ruQUMB1sjj3ErMTyA3nnEGtE0=; b=elFrOCuS47FORRQu3NrQdRlM9Yidk0kWxAEQ9oGVTrmqxfJz7tNeEEveslC4frvNPX J4MXsNY+pmOhJYoUpB+C/xCMCGQ6t+0geSApu5oYaVFZzqNVaJRAeUYAy0rJBDi29eH6 /hOC5SiNwGvVKMKGAlf/FbdE3P9Hisiri7ZZJUF8tTAKuuHxLx+NXWQE2KVWQaZXHpmV iIONtX1K7gegRIZmwuGq8veu7V7fg9YwlP998+oJtTLOklOgr/WTc/1nWnvMQyLdRaal Ek+7894uVq8VypGZKfvynisWC8H/PkjMPniJvj/IS3OVDcldJQQ7e+VtMXKpCAa0mhuJ qnZA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gJo3j3MD; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h4si1408831edf.490.2020.12.21.23.08.00; Mon, 21 Dec 2020 23:08:00 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gJo3j3MD; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725902AbgLVHHI (ORCPT + 7 others); Tue, 22 Dec 2020 02:07:08 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:54062 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725783AbgLVHHI (ORCPT ); Tue, 22 Dec 2020 02:07:08 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0BM763o4064278; Tue, 22 Dec 2020 01:06:03 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1608620763; bh=vQYJz6q3QwL2K0Sik8ruQUMB1sjj3ErMTyA3nnEGtE0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=gJo3j3MDLLrFUJMtlQxO+dcRmmFN0ZE8FTm2sEsH7VVHt/JgptyGuJ0+v7XbLOxV/ GezppDkKvC6EPwEVKcFsN9aBZUql7OP9ZHe9yImAdCuQHYEfhhrNsYZMIEsTbtyPtW Kv8AzYf2oq++DLtSWXbooV1kXuY2URlLddnMZ1rk= Received: from DFLE101.ent.ti.com (dfle101.ent.ti.com [10.64.6.22]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0BM7633W032169 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 22 Dec 2020 01:06:03 -0600 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 22 Dec 2020 01:06:02 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 22 Dec 2020 01:06:02 -0600 Received: from a0393678-ssd.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0BM75N7J050344; Tue, 22 Dec 2020 01:05:59 -0600 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Swapnil Jakhade , , , CC: Nishanth Menon , Philipp Zabel Subject: [PATCH v2 10/14] phy: cadence: sierra: Enable pll_cmnlc and pll_cmnlc1 clocks Date: Tue, 22 Dec 2020 12:35:16 +0530 Message-ID: <20201222070520.28132-11-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201222070520.28132-1-kishon@ti.com> References: <20201222070520.28132-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Get pll_cmnlc and pll_cmnlc1 optional clocks and enable them. This will enable REFRCV/1 in case the pll_cmnlc/1 takes input from REFRCV/1 respectively. Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/phy-cadence-sierra.c | 56 +++++++++++++++++++++++- 1 file changed, 54 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index 2a509be80c80..553971683f2d 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -267,6 +267,8 @@ struct cdns_sierra_phy { struct clk *clk; struct clk *cmn_refclk_dig_div; struct clk *cmn_refclk1_dig_div; + struct clk *pll_cmnlc; + struct clk *pll_cmnlc1; int nsubnodes; u32 num_lanes; bool autoconf; @@ -874,9 +876,59 @@ static int cdns_sierra_phy_get_clocks(struct cdns_sierra_phy *sp, } sp->cmn_refclk1_dig_div = clk; + clk = devm_clk_get_optional(dev, "pll_cmnlc"); + if (IS_ERR(clk)) { + dev_err(dev, "pll_cmnlc clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->pll_cmnlc = clk; + + clk = devm_clk_get_optional(dev, "pll_cmnlc1"); + if (IS_ERR(clk)) { + dev_err(dev, "pll_cmnlc1 clock not found\n"); + ret = PTR_ERR(clk); + return ret; + } + sp->pll_cmnlc1 = clk; + return 0; } +static int cdns_sierra_phy_enable_clocks(struct cdns_sierra_phy *sp) +{ + int ret; + + ret = clk_prepare_enable(sp->clk); + if (ret) + return ret; + + ret = clk_prepare_enable(sp->pll_cmnlc); + if (ret) + goto err_pll_cmnlc; + + ret = clk_prepare_enable(sp->pll_cmnlc1); + if (ret) + goto err_pll_cmnlc1; + + return 0; + +err_pll_cmnlc: + clk_disable_unprepare(sp->clk); + +err_pll_cmnlc1: + clk_disable_unprepare(sp->pll_cmnlc); + + return 0; +} + +static void cdns_sierra_phy_disable_clocks(struct cdns_sierra_phy *sp) +{ + clk_disable_unprepare(sp->pll_cmnlc1); + clk_disable_unprepare(sp->pll_cmnlc); + clk_disable_unprepare(sp->clk); +} + static int cdns_sierra_phy_get_resets(struct cdns_sierra_phy *sp, struct device *dev) { @@ -961,7 +1013,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) if (ret) goto unregister_pll_mux; - ret = clk_prepare_enable(sp->clk); + ret = cdns_sierra_phy_enable_clocks(sp); if (ret) goto unregister_pll_mux; @@ -1038,7 +1090,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev) reset_control_put(sp->phys[i].lnk_rst); of_node_put(child); clk_disable: - clk_disable_unprepare(sp->clk); + cdns_sierra_phy_disable_clocks(sp); reset_control_assert(sp->apb_rst); unregister_pll_mux: cdns_sierra_pll_mux_unregister(sp, dn);