diff mbox series

[1/6] arm64: dts: renesas: r8a77951: Add TMU nodes

Message ID 20201209201950.817566-2-niklas.soderlund+renesas@ragnatech.se
State Superseded
Headers show
Series arm64: dts: renesas: Add TMU nodes | expand

Commit Message

Niklas Söderlund Dec. 9, 2020, 8:19 p.m. UTC
Add device nodes for the Timer Unit (TMU) on the Renesas R-Car H3
(r8a77951) SoC.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
---
 arch/arm64/boot/dts/renesas/r8a77951.dtsi | 65 +++++++++++++++++++++++
 1 file changed, 65 insertions(+)

Comments

Geert Uytterhoeven Dec. 10, 2020, 1:10 p.m. UTC | #1
Hi Niklas,

On Wed, Dec 9, 2020 at 9:20 PM Niklas Söderlund
<niklas.soderlund+renesas@ragnatech.se> wrote:
> Add device nodes for the Timer Unit (TMU) on the Renesas R-Car H3

> (r8a77951) SoC.

>

> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>


Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi

> +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi


> +               tmu4: timer@ffc00000 {

> +                       compatible = "renesas,tmu-r8a7795", "renesas,tmu";

> +                       reg = <0 0xffc00000 0 0x30>;

> +                       interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>,

> +                                    <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>,

> +                                    <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;


These interrupt numbers are wrong: they should be 406, 407, and 408.
The rest looks good to me.
Same comment for the other 5 patches.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Niklas Söderlund Dec. 10, 2020, 3:14 p.m. UTC | #2
Hi Geert,

Thanks for your feedback.

On 2020-12-10 14:10:14 +0100, Geert Uytterhoeven wrote:
> Hi Niklas,

> 

> On Wed, Dec 9, 2020 at 9:20 PM Niklas Söderlund

> <niklas.soderlund+renesas@ragnatech.se> wrote:

> > Add device nodes for the Timer Unit (TMU) on the Renesas R-Car H3

> > (r8a77951) SoC.

> >

> > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

> 

> Thanks for your patch!

> 

> > --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi

> > +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi

> 

> > +               tmu4: timer@ffc00000 {

> > +                       compatible = "renesas,tmu-r8a7795", "renesas,tmu";

> > +                       reg = <0 0xffc00000 0 0x30>;

> > +                       interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>,

> > +                                    <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>,

> > +                                    <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;

> 

> These interrupt numbers are wrong: they should be 406, 407, and 408.

> The rest looks good to me.

> Same comment for the other 5 patches.


Thanks for spotting this, I feel a bit embarrassed having looked at the 
ID instead of SPI No in the tables :-)

> 

> Gr{oetje,eeting}s,

> 

>                         Geert

> 

> -- 

> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

> 

> In personal conversations with technical people, I call myself a hacker. But

> when I'm talking to journalists I just say "programmer" or something like that.

>                                 -- Linus Torvalds


-- 
Regards,
Niklas Söderlund
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index 9d60bcf69e4f52ce..ecdc18b40a3606f6 100644
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -616,6 +616,71 @@  intc_ex: interrupt-controller@e61c0000 {
 			resets = <&cpg 407>;
 		};
 
+		tmu0: timer@e61e0000 {
+			compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+			reg = <0 0xe61e0000 0 0x30>;
+			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 125>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			resets = <&cpg 125>;
+			status = "disabled";
+		};
+
+		tmu1: timer@e6fc0000 {
+			compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+			reg = <0 0xe6fc0000 0 0x30>;
+			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 124>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			resets = <&cpg 124>;
+			status = "disabled";
+		};
+
+		tmu2: timer@e6fd0000 {
+			compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+			reg = <0 0xe6fd0000 0 0x30>;
+			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 123>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			resets = <&cpg 123>;
+			status = "disabled";
+		};
+
+		tmu3: timer@e6fe0000 {
+			compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+			reg = <0 0xe6fe0000 0 0x30>;
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 122>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			resets = <&cpg 122>;
+			status = "disabled";
+		};
+
+		tmu4: timer@ffc00000 {
+			compatible = "renesas,tmu-r8a7795", "renesas,tmu";
+			reg = <0 0xffc00000 0 0x30>;
+			interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 121>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			resets = <&cpg 121>;
+			status = "disabled";
+		};
+
 		i2c0: i2c@e6500000 {
 			#address-cells = <1>;
 			#size-cells = <0>;