From patchwork Tue Dec 8 12:14:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 339731 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3637752jai; Tue, 8 Dec 2020 04:15:39 -0800 (PST) X-Google-Smtp-Source: ABdhPJwDDjS2R9+5Nf5rgLDj1HAg6IfQRBsZkk0MyEXlQyxrhQCk5JQHvouWZB1/e3S1wkWzVplo X-Received: by 2002:a05:6402:a53:: with SMTP id bt19mr24824328edb.104.1607429739250; Tue, 08 Dec 2020 04:15:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607429739; cv=none; d=google.com; s=arc-20160816; b=JB6PFvpRg+oDUFuW7/7/Me5U1VQbkOmJTe6fPfYZQxNPgTIhIvPCPyGl1dsZNHj3cV ny/Tzi5OShNPA6ZAiczoQW2N/E0JLZ50RCPs5fr+yhc2/Na1wWu9U7Q6btt6iL/Bkj/f BYcRBEyox3B0gBhqZqe3rvYZEOeDyi4vuZO3pocS957RT1Ai9kDPwrAbSLhZs8YUArNR +cJBpnYHiJP2UEcU8jEByF5ZKyTiY8oEiUWyZUFTo0YXHd8jHeUoOH+A/07Uk1F5OVjg u4HIernBrTirHa7JSVD72pla7xOt0LHHMuMGhzPluIs7ZSj23sAehMnR5xoO7yubQNrn 8Mzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=dWWkPOWcjIUOLcJfFo8bbt5YdJAUuNIEGrPeCzwaMaQ=; b=mS2GUO1cJLwRrxl/p9lY7AOZuUmXVKWU8CIzJEFc+HBmovprHW/dO9+7gVRmW0S9zJ hmNbb/MyidtnPrg5EWvdkvrJk9YozoVyvvCKT/B+XpEZUMkOB8Lv7YP+dETw4DcK8C/B BzDd9fPqmq80Aug+eHZM6C7kC0EuOshbqP1W3vfAfrbX8/MvM7Ta4wBGsgnvZADsRUxS H17nrwBzrE/xKR5hBptsqFjE6MhRz7RAwijYwDUEwdNabe8y0T4FPQskgJg9ARDiQEh+ LhG/VbBF9khNsCCdYG8VxImD5ZBESVVaQiIm+wyxO2XWYJq+2l/BHV22rIIpDZl406Ym 9KEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Fqn8RNMj; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w2si9948757edx.591.2020.12.08.04.15.39; Tue, 08 Dec 2020 04:15:39 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Fqn8RNMj; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727524AbgLHMPi (ORCPT + 6 others); Tue, 8 Dec 2020 07:15:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729340AbgLHMPh (ORCPT ); Tue, 8 Dec 2020 07:15:37 -0500 Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D479C06138C for ; Tue, 8 Dec 2020 04:14:26 -0800 (PST) Received: by mail-pf1-x443.google.com with SMTP id b26so13739362pfi.3 for ; Tue, 08 Dec 2020 04:14:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dWWkPOWcjIUOLcJfFo8bbt5YdJAUuNIEGrPeCzwaMaQ=; b=Fqn8RNMjud0Hec2D6vQ4aXgHuRNhVX7pX/pW9ZV8Q6L/mMZwzTcl70P5ooYzbkkbwb jvWQ+IZALlfnURAOI0XtQwR/OJ6ZQc4BblNni/LgNrBKjmBaj+OeBnSXXZisUmS9OBkM Ni9YKJT5gwRedyIdhS+jTC++LUsF46QWx8apYk8JiexrjyoavHDYAz7ZbFCTyZys7MdB LaxtalGsVcIkj4E6S0tp7VT6ijrXHju58uU/KgY0O/M+wSJmWpnflTwGYjToQknvzMnm C/JdX/3zYSBar3uLcIP8hTJbDTp+xJPF6AGlbhs8hDvwmANXFxQ9G1B4nrBDQx93jLlE bOGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dWWkPOWcjIUOLcJfFo8bbt5YdJAUuNIEGrPeCzwaMaQ=; b=rN0G+4UyNMyvpnc1l8ed2xt7DhgOEWcHEBTSMAc4I/j+J1XKEc+KnJrP3weiAR7alM IYDaacKQmLStS1o6lx7hUro8Ttk3u9g9ILfdADbU76bXJc25OAM9otNaHUaARjd/nh9g UNKNM3Y7vqzWdkZ7AZIX0uDuOXSZU5d4OzQignlLvnaJFhXEeg9zh3mYTkxINi7jsPJ6 +L/DgGZEbj1V4MY9cjHWczxDcF20SUQTRvRjNFEb/O8nFCnp/j31pWbR02YyJGESydTx fC5Nfu31kLCYkSm68r8L+WPtVWWfo4rl1Pc81Rznou8c/Xt65Zt4bEAQQ+hQsTSgH3ob QG9Q== X-Gm-Message-State: AOAM531+2+x9kRKqZ5MJwp8ezS821mdP6ZYdv002m20JIoRpRCAriXUn fsjryWuwJDWgqio+TtMfn44R X-Received: by 2002:aa7:8f35:0:b029:19b:1258:ec5d with SMTP id y21-20020aa78f350000b029019b1258ec5dmr20439747pfr.9.1607429666157; Tue, 08 Dec 2020 04:14:26 -0800 (PST) Received: from localhost.localdomain ([103.59.133.81]) by smtp.gmail.com with ESMTPSA id v3sm3489889pjn.7.2020.12.08.04.14.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Dec 2020 04:14:25 -0800 (PST) From: Manivannan Sadhasivam X-Google-Original-From: Manivannan Sadhasivam To: lorenzo.pieralisi@arm.com Cc: agross@kernel.org, bjorn.andersson@linaro.org, svarbanov@mm-sol.com, bhelgaas@google.com, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, mgautam@codeaurora.org, devicetree@vger.kernel.org, truong@codeaurora.org, Manivannan Sadhasivam , Rob Herring Subject: [PATCH v6 2/3] PCI: qcom: Add SM8250 SoC support Date: Tue, 8 Dec 2020 17:44:01 +0530 Message-Id: <20201208121402.178011-3-mani@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201208121402.178011-1-mani@kernel.org> References: <20201208121402.178011-1-mani@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Manivannan Sadhasivam The PCIe IP (rev 1.9.0) on SM8250 SoC is similar to the one used on SDM845. Hence the support is added reusing the members of ops_2_7_0. The key difference between ops_2_7_0 and ops_1_9_0 is the config_sid callback, which will be added in successive commit. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring Reviewed-by: Bjorn Andersson --- drivers/pci/controller/dwc/pcie-qcom.c | 11 +++++++++++ 1 file changed, 11 insertions(+) -- 2.25.1 diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index e49791c4f846..750ff7378870 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1348,6 +1348,16 @@ static const struct qcom_pcie_ops ops_2_7_0 = { .post_deinit = qcom_pcie_post_deinit_2_7_0, }; +/* Qcom IP rev.: 1.9.0 */ +static const struct qcom_pcie_ops ops_1_9_0 = { + .get_resources = qcom_pcie_get_resources_2_7_0, + .init = qcom_pcie_init_2_7_0, + .deinit = qcom_pcie_deinit_2_7_0, + .ltssm_enable = qcom_pcie_2_3_2_ltssm_enable, + .post_init = qcom_pcie_post_init_2_7_0, + .post_deinit = qcom_pcie_post_deinit_2_7_0, +}; + static const struct dw_pcie_ops dw_pcie_ops = { .link_up = qcom_pcie_link_up, .start_link = qcom_pcie_start_link, @@ -1446,6 +1456,7 @@ static const struct of_device_id qcom_pcie_match[] = { { .compatible = "qcom,pcie-ipq4019", .data = &ops_2_4_0 }, { .compatible = "qcom,pcie-qcs404", .data = &ops_2_4_0 }, { .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 }, + { .compatible = "qcom,pcie-sm8250", .data = &ops_1_9_0 }, { } };