From patchwork Tue Dec 8 09:04:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 339717 Delivered-To: patch@linaro.org Received: by 2002:a17:906:4755:0:0:0:0 with SMTP id j21csp3619085ejs; Tue, 8 Dec 2020 01:07:40 -0800 (PST) X-Google-Smtp-Source: ABdhPJx9fX9MDGVWGD+JDNzaw6bdyUTzMKMP48zd0KoS9ILGyKt5goVOq7YAbNSn3wBaPn6m9rBG X-Received: by 2002:a17:906:f1cc:: with SMTP id gx12mr21598111ejb.164.1607418460758; Tue, 08 Dec 2020 01:07:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607418460; cv=none; d=google.com; s=arc-20160816; b=usDOcdVgcyXJmKAnxq+qhIY/U6xoAI+H2+wFlCX50yjB24br0Z7jEBS8lBGk7Gd3v3 2rBZbjG1rdHifRxcauT9BYgUv0BAdn0gPECVNPIjzx9gHQNScDtpipnOcSuXzcBSwMoN 8zK8Nx5ypZ8bxp62f3vju8k5sjsng/GdKv9L30YCa1UmWoeO1QzsYQkCVz4eKlHHeY1h O0zVvJ/Pl0WPDKlA1n9gaUnMdiT0JlDyEJkGd29sXPXyfyFrL7qux1VNtiUVVa/+plgh jqbdLTQhMnA44D7hcL8R0k3q4T1JG2bmduSytRKi+RaRiCcLmOiptHTwpPC5cRk8Oq4j L/RA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=KrUTk8ul87troFJrpjX2nEBHGpMAgPlBoUHLfqkKttI=; b=JWdf8yoDCh2rawdiyvCG0w8H/Qppsb2bCqLmyLA8eBDidphQSppRDT0FzhPXGlnY+c X/kg0pMMZF9QNxPtOe0OnzxNA+1qq2p2+YCQdGFteLCeRdj/L/cwTwjo/Q0CMn5soNdA iOvJiCqBI1eH67g+B2lfTO33bLwFW9pjvdxZjlPeT2GKneLdW22Cg2SKvE7ca+p0KAZX CIId6IabN7SSHdr91MeTEvBSwLGYT/UJN9icLuZhIlzD/KAe0WL6fBC4qGShVvGC1MyU hRaxJtic1biUDr/oxjm7Tju8S5LGNfJYjWBqDRrVMGX6oo+00NAVKQ4ui6me78idxRJQ X0gg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tO64pWxr; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id o18si9973884edz.265.2020.12.08.01.07.40; Tue, 08 Dec 2020 01:07:40 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tO64pWxr; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728901AbgLHJGQ (ORCPT + 6 others); Tue, 8 Dec 2020 04:06:16 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:34564 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728875AbgLHJGO (ORCPT ); Tue, 8 Dec 2020 04:06:14 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0B894YOB002979; Tue, 8 Dec 2020 03:04:34 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1607418274; bh=KrUTk8ul87troFJrpjX2nEBHGpMAgPlBoUHLfqkKttI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tO64pWxrnaKCcYKXhA7FGr5IpijsrYqVwy573KRFOqo9CJsw8XfDJucoqtw4UnLsb 8Ghhz8FMJokFAFE2cuKP/oLw8OanF5APgbTAxAi6BIoJYZoylOxDoQq/13kvg7/tJ4 YDRCG7IS3nL8tWHcWe0JhktedT308zSaO8UrOcwQ= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0B894YCg095817 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 8 Dec 2020 03:04:34 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 8 Dec 2020 03:04:34 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 8 Dec 2020 03:04:34 -0600 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0B893dcI120112; Tue, 8 Dec 2020 03:04:29 -0600 From: Peter Ujfalusi To: , , , CC: , , , , , , , Subject: [PATCH v3 13/20] dmaengine: ti: k3-psil: Extend psil_endpoint_config for K3 PKTDMA Date: Tue, 8 Dec 2020 11:04:33 +0200 Message-ID: <20201208090440.31792-14-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201208090440.31792-1-peter.ujfalusi@ti.com> References: <20201208090440.31792-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Additional fields needed for K3 PKTDMA to be able to handle the mapped channels (channels are locked to handle specific threads) and flow ranges for these mapped threads. PKTDMA also introduces tflow for tx channels which can not be found in K3 UDMA architecture. Signed-off-by: Peter Ujfalusi --- include/linux/dma/k3-psil.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki Reviewed-by: Grygorii Strashko diff --git a/include/linux/dma/k3-psil.h b/include/linux/dma/k3-psil.h index 1962f75fa2d3..36e22c5a0f29 100644 --- a/include/linux/dma/k3-psil.h +++ b/include/linux/dma/k3-psil.h @@ -50,6 +50,15 @@ enum psil_endpoint_type { * @channel_tpl: Desired throughput level for the channel * @pdma_acc32: ACC32 must be enabled on the PDMA side * @pdma_burst: BURST must be enabled on the PDMA side + * @mapped_channel_id: PKTDMA thread to channel mapping for mapped channels. + * The thread must be serviced by the specified channel if + * mapped_channel_id is >= 0 in case of PKTDMA + * @flow_start: PKDMA flow range start of mapped channel. Unmapped + * channels use flow_id == chan_id + * @flow_num: PKDMA flow count of mapped channel. Unmapped channels + * use flow_id == chan_id + * @default_flow_id: PKDMA default (r)flow index of mapped channel. + * Must be within the flow range of the mapped channel. */ struct psil_endpoint_config { enum psil_endpoint_type ep_type; @@ -63,6 +72,13 @@ struct psil_endpoint_config { /* PDMA properties, valid for PSIL_EP_PDMA_* */ unsigned pdma_acc32:1; unsigned pdma_burst:1; + + /* PKDMA mapped channel */ + int mapped_channel_id; + /* PKTDMA tflow and rflow ranges for mapped channel */ + u16 flow_start; + u16 flow_num; + u16 default_flow_id; }; int psil_set_new_ep_config(struct device *dev, const char *name,