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[79.158.79.234]) by smtp.gmail.com with ESMTPSA id w10sm181303wra.34.2020.11.19.07.43.40 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Nov 2020 07:43:41 -0800 (PST) From: Sergio Paracuellos To: vkoul@kernel.org Cc: robh+dt@kernel.org, kishon@ti.com, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, devel@driverdev.osuosl.org, neil@brown.name, Rob Herring Subject: [PATCH v5 1/4] dt-bindings: phy: Add binding for Mediatek MT7621 PCIe PHY Date: Thu, 19 Nov 2020 16:43:34 +0100 Message-Id: <20201119154337.9195-2-sergio.paracuellos@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201119154337.9195-1-sergio.paracuellos@gmail.com> References: <20201119154337.9195-1-sergio.paracuellos@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add bindings to describe Mediatek MT7621 PCIe PHY. Signed-off-by: Sergio Paracuellos Reviewed-by: Rob Herring --- .../bindings/phy/mediatek,mt7621-pci-phy.yaml | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml new file mode 100644 index 000000000000..cf32bbc45b5d --- /dev/null +++ b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/mediatek,mt7621-pci-phy.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Mediatek Mt7621 PCIe PHY Device Tree Bindings + +maintainers: + - Sergio Paracuellos + +properties: + compatible: + const: mediatek,mt7621-pci-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 1 + description: selects if the phy is dual-ported + +required: + - compatible + - reg + - "#phy-cells" + +additionalProperties: false + +examples: + - | + pcie0_phy: pcie-phy@1e149000 { + compatible = "mediatek,mt7621-pci-phy"; + reg = <0x1e149000 0x0700>; + #phy-cells = <1>; + };