From patchwork Tue Nov 17 10:56:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 324562 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp4066557ils; Tue, 17 Nov 2020 02:57:10 -0800 (PST) X-Google-Smtp-Source: ABdhPJxyBltVXPGTSDnH42nq3z9zoFcPBJ5jNV7MlB15ui1m00r6cMT9PsaLtNuA8OJXrkPKKI9r X-Received: by 2002:aa7:d709:: with SMTP id t9mr20926332edq.305.1605610630712; Tue, 17 Nov 2020 02:57:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605610630; cv=none; d=google.com; s=arc-20160816; b=YGFUebUECFx6rPGFN1aqUdzkyCTNBNE5ognShRCv+hB6TCtMge/v9Se4jC5D1LmvaS 9shi1xeAK1Kr7FEBL5R8ov38QvgmtIa6QwvGV9S20P+oFCuulKsWCzHCSdPrd0oAQcie YndobxZeVFoUsU8hOqJF1fJcJbtI7kTdJCrWNzSV4J5fG4gMiM2YNZovZ5uO/nwvxuGY gS8AAp9OON2e9O5WosAUNlO9DcjQ8mdcMGjeDFxOUJMlnyZcrYHtYlB91S2vgt271N5f lOMlLUKwhUgQ4x3CTRuCCVrlXSyFmQ4q3qTdZ7QcVXKUNPR6PU9HllIXHSBRYYFsk4A/ IXpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=24q5eD4y4xZgELs8UTDdNZFf1mU01Jty7BUIc3+XGk4=; b=P9sb9AaQn9lGVzx5ITuGfVi4qHocrjHtr+puK4d1yFJ/yEy9HALCSCHD+q8JWfI0Kv C4xelPQi0mc2BKgr4lPeZ3+OzVjbHqUSsVlRdYX1WREHXZrPqTiPs6N2kiMnA9cwdrYs frfeDiMF9bKTEf7Xt15iHhA2goDhGICKNVcOCsAHQYEarnFdHkFw10H+OxGYlduK42AU DoSeghdgOVgigUUEC2WKUDf4hxBNAybs8NOW7Yp5M46fQwvrDDrmmd9lkAmFNM92BfLo qMfSpap2btdKf4wTec7XmxdHW888HWSI8wvPnXMAYafF8teHcuNCor7jhCjJu8GBcQGE G5UA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tYW3hLul; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dm25si12962825edb.238.2020.11.17.02.57.10; Tue, 17 Nov 2020 02:57:10 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tYW3hLul; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728101AbgKQK4g (ORCPT + 6 others); Tue, 17 Nov 2020 05:56:36 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:59664 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727347AbgKQK4g (ORCPT ); Tue, 17 Nov 2020 05:56:36 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0AHAuVI2019558; Tue, 17 Nov 2020 04:56:31 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1605610591; bh=24q5eD4y4xZgELs8UTDdNZFf1mU01Jty7BUIc3+XGk4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tYW3hLul0fVpDYy1m/RvZ/5ySeiEBG5wvZC6pVfPZhNc61Qh5LO7lwpWll3i5xobv 8b82CYGbqXsOXfg4zhsK2zWBbXhigw9pDfrXkM7oWBjmT5BJphU/KHsvNwW27HwlyB n758PNCY3xzROQtVa/Kv2er32eoYKOi0jTOC28uM= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0AHAuVEA005357 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 17 Nov 2020 04:56:31 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 17 Nov 2020 04:56:30 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 17 Nov 2020 04:56:30 -0600 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0AHAu6tr087311; Tue, 17 Nov 2020 04:56:28 -0600 From: Peter Ujfalusi To: , , , CC: , , , , , , , Subject: [PATCH v2 07/19] dmaengine: Add support for per channel coherency handling Date: Tue, 17 Nov 2020 12:56:44 +0200 Message-ID: <20201117105656.5236-8-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201117105656.5236-1-peter.ujfalusi@ti.com> References: <20201117105656.5236-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org If the DMA device supports per channel coherency configuration (a channel can be configured to have coherent or not coherent view) then a single device (the DMA controller's device) can not be used for dma_api for all channels as channels can have different coherency. Introduce custom_dma_mapping flag for the dma_chan and a new helper to get the device pointer to be used for dma_api for the given channel. Client drivers should be updated to be able to support per channel coherency by: - dma_map_single(chan->device->dev, ptr, size, DMA_TO_DEVICE); + struct device *dma_dev = dmaengine_get_dma_device(chan); + + dma_map_single(dma_dev, ptr, size, DMA_TO_DEVICE); Signed-off-by: Peter Ujfalusi --- include/linux/dmaengine.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index d6197fe875af..182a1a2e7793 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -357,11 +357,14 @@ struct dma_chan { * @chan: driver channel device * @device: sysfs device * @dev_id: parent dma_device dev_id + * @chan_dma_dev: The channel is using custom/different dma-mapping + * compared to the parent dma_device */ struct dma_chan_dev { struct dma_chan *chan; struct device device; int dev_id; + bool chan_dma_dev; }; /** @@ -1613,4 +1616,13 @@ dmaengine_get_direction_text(enum dma_transfer_direction dir) return "invalid"; } } + +static inline struct device *dmaengine_get_dma_device(struct dma_chan *chan) +{ + if (chan->dev->chan_dma_dev) + return &chan->dev->device; + + return chan->device->dev; +} + #endif /* DMAENGINE_H */