From patchwork Mon Nov 16 17:11:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 324734 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D4E8C64E7A for ; Mon, 16 Nov 2020 17:12:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5935A207BC for ; Mon, 16 Nov 2020 17:12:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732621AbgKPRMT (ORCPT ); Mon, 16 Nov 2020 12:12:19 -0500 Received: from relay11.mail.gandi.net ([217.70.178.231]:52821 "EHLO relay11.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731130AbgKPRMT (ORCPT ); Mon, 16 Nov 2020 12:12:19 -0500 X-Greylist: delayed 2863 seconds by postgrey-1.27 at vger.kernel.org; Mon, 16 Nov 2020 12:12:18 EST Received: from localhost (91-175-115-186.subs.proxad.net [91.175.115.186]) (Authenticated sender: gregory.clement@bootlin.com) by relay11.mail.gandi.net (Postfix) with ESMTPSA id 96CFF100041; Mon, 16 Nov 2020 17:12:15 +0000 (UTC) From: Gregory CLEMENT To: Sebastian Reichel , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org Cc: Thomas Petazzoni , Alexandre Belloni , Lars Povlsen , Subject: [PATCH 1/5] dt-bindings: reset: ocelot: Add documentation for 'microchip, reset-switch-core' property Date: Mon, 16 Nov 2020 18:11:55 +0100 Message-Id: <20201116171159.1735315-2-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201116171159.1735315-1-gregory.clement@bootlin.com> References: <20201116171159.1735315-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Lars Povlsen This documents the 'microchip,reset-switch-core' property in the ocelot-reset driver. Signed-off-by: Lars Povlsen --- .../devicetree/bindings/power/reset/ocelot-reset.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt index 4d530d815484..20fff03753ad 100644 --- a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt +++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt @@ -9,9 +9,15 @@ microchip Sparx5 armv8 SoC's. Required Properties: - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset" +Optional properties: +- microchip,reset-switch-core : Perform a switch core reset at the + time of driver load. This is may be used to initialize the switch + core to a known state (before other drivers are loaded). + Example: reset@1070008 { compatible = "mscc,ocelot-chip-reset"; reg = <0x1070008 0x4>; + microchip,reset-switch-core; };