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[79.195.234.119]) by smtp.googlemail.com with ESMTPSA id i13sm9233520ejv.84.2020.11.15.10.52.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Nov 2020 10:52:44 -0800 (PST) From: Martin Blumenstingl To: davem@davemloft.net, kuba@kernel.org, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, robh+dt@kernel.org, netdev@vger.kernel.org Cc: jianxin.pan@amlogic.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, khilman@baylibre.com, narmstrong@baylibre.com, jbrunet@baylibre.com, andrew@lunn.ch, f.fainelli@gmail.com, Martin Blumenstingl Subject: [PATCH RFC v2 3/5] net: stmmac: dwmac-meson8b: use picoseconds for the RGMII RX delay Date: Sun, 15 Nov 2020 19:52:08 +0100 Message-Id: <20201115185210.573739-4-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201115185210.573739-1-martin.blumenstingl@googlemail.com> References: <20201115185210.573739-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Amlogic Meson G12A, G12B and SM1 SoCs have a more advanced RGMII RX delay register which allows picoseconds precision. Parse the new "amlogic,rgmii-rx-delay-ps" property or fall back to the old "amlogic,rx-delay-ns". Signed-off-by: Martin Blumenstingl Reviewed-by: Florian Fainelli --- .../ethernet/stmicro/stmmac/dwmac-meson8b.c | 22 ++++++++++++------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c index e27e2e7a53fd..03fce678b9f5 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c @@ -83,7 +83,7 @@ struct meson8b_dwmac { phy_interface_t phy_mode; struct clk *rgmii_tx_clk; u32 tx_delay_ns; - u32 rx_delay_ns; + u32 rx_delay_ps; struct clk *timing_adj_clk; }; @@ -276,7 +276,7 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac) tx_dly_config = FIELD_PREP(PRG_ETH0_TXDLY_MASK, dwmac->tx_delay_ns >> 1); - if (dwmac->rx_delay_ns == 2) + if (dwmac->rx_delay_ps == 2000) rx_dly_config = PRG_ETH0_ADJ_ENABLE | PRG_ETH0_ADJ_SETUP; else rx_dly_config = 0; @@ -406,14 +406,20 @@ static int meson8b_dwmac_probe(struct platform_device *pdev) &dwmac->tx_delay_ns)) dwmac->tx_delay_ns = 2; - /* use 0ns as fallback since this is what most boards actually use */ - if (of_property_read_u32(pdev->dev.of_node, "amlogic,rx-delay-ns", - &dwmac->rx_delay_ns)) - dwmac->rx_delay_ns = 0; + /* RX delay defaults to 0ps since this is what many boards use */ + if (of_property_read_u32(pdev->dev.of_node, + "amlogic,rgmii-rx-delay-ps", + &dwmac->rx_delay_ps)) { + if (!of_property_read_u32(pdev->dev.of_node, + "amlogic,rx-delay-ns", + &dwmac->rx_delay_ps)) + /* convert ns to ps */ + dwmac->rx_delay_ps *= 1000; + } - if (dwmac->rx_delay_ns != 0 && dwmac->rx_delay_ns != 2) { + if (dwmac->rx_delay_ps != 0 && dwmac->rx_delay_ps != 2000) { dev_err(&pdev->dev, - "The only allowed RX delays values are: 0ns, 2ns"); + "The only allowed RX delays values are: 0ps, 2000ps"); ret = -EINVAL; goto err_remove_config_dt; }