From patchwork Sun Nov 15 13:59:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 324804 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 053AAC63697 for ; Sun, 15 Nov 2020 13:59:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B93D322450 for ; Sun, 15 Nov 2020 13:59:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="mOyQwDpB" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727172AbgKON7f (ORCPT ); Sun, 15 Nov 2020 08:59:35 -0500 Received: from mail.kernel.org ([198.145.29.99]:40608 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726743AbgKON7e (ORCPT ); Sun, 15 Nov 2020 08:59:34 -0500 Received: from dellmb.labs.office.nic.cz (nat-1.nic.cz [217.31.205.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7DFF62417E; Sun, 15 Nov 2020 13:59:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1605448774; bh=QZMLDFfEbWYSwmuncEeZTEKxmJIqaKQDrvYBvjkMip0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mOyQwDpBZpXhjP/albqLdzysLef+1v65w7ZtuFHZqLAN1s5BOTV7gkxZSQ8hKWHzE dYKQkJm0pMb+Nb0ov1xpvrmNQS81ICHmM6NVgDyTzxIipdChwnBamv1ln2ZmXlfC0S lrLN58BFeoXtmEmbr3pjzej6DJdyFTKx0wkLdk9w= From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Gregory CLEMENT Cc: arm@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= , linux-arm-kernel@lists.infradead.org, =?utf-8?q?Uwe_Kleine-K?= =?utf-8?b?w7ZuaWc=?= , Jason Cooper , =?utf-8?q?Andreas_F=C3=A4?= =?utf-8?q?rber?= , Andrew Lunn , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH mvebu-dt v3 3/7] ARM: dts: turris-omnia: describe switch interrupt Date: Sun, 15 Nov 2020 14:59:19 +0100 Message-Id: <20201115135923.11523-4-kabel@kernel.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201115135923.11523-1-kabel@kernel.org> References: <20201115135923.11523-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Describe switch interrupt for Turris Omnia so that the CPU does not have to poll the switch. We also need to to set mpp45 pin to gpio function for this. Signed-off-by: Marek Behún Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia") Cc: linux-arm-kernel@lists.infradead.org Cc: Uwe Kleine-König Cc: Jason Cooper Cc: Gregory CLEMENT Cc: Andreas Färber Cc: Andrew Lunn Cc: Rob Herring Cc: devicetree@vger.kernel.org --- arch/arm/boot/dts/armada-385-turris-omnia.dts | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts index 9de26c78ec4c..7ccebf7d1757 100644 --- a/arch/arm/boot/dts/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts @@ -260,13 +260,18 @@ phy1: phy@1 { /* Switch MV88E6176 at address 0x10 */ switch@10 { + pinctrl-names = "default"; + pinctrl-0 = <&swint_pins>; compatible = "marvell,mv88e6085"; #address-cells = <1>; #size-cells = <0>; - dsa,member = <0 0>; + dsa,member = <0 0>; reg = <0x10>; + interrupt-parent = <&gpio1>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; + ports { #address-cells = <1>; #size-cells = <0>; @@ -319,6 +324,11 @@ pcawan_pins: pcawan-pins { marvell,function = "gpio"; }; + swint_pins: swint-pins { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + spi0cs0_pins: spi0cs0-pins { marvell,pins = "mpp25"; marvell,function = "spi0";