From patchwork Sun Nov 8 18:51:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 321305 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73949C4742C for ; Sun, 8 Nov 2020 18:51:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 37ADC2076E for ; Sun, 8 Nov 2020 18:51:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="meQsPxlb" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728939AbgKHSve (ORCPT ); Sun, 8 Nov 2020 13:51:34 -0500 Received: from ssl.serverraum.org ([176.9.125.105]:54145 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728904AbgKHSvc (ORCPT ); Sun, 8 Nov 2020 13:51:32 -0500 Received: from apollo.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:6257:18ff:fec4:ca34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 22C7C23E63; Sun, 8 Nov 2020 19:51:29 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1604861489; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JH5gvZvLtD+T6J5gJa7u72Ihh3TsKWgIHzRE/YcUp4c=; b=meQsPxlbtXajdgdWxX06jAMgrkn06oDTGxMF5rh19gKHlrAlSlqSWQxIb9KY9RyBMdkS01 m41g+wFvildS8iADOqXtkiyAXkCMKaktUlBael4xagTXeHfVIKrIvrL2dr1c5k+oaew006 I1uupI6t7kGO60VbX5nkSWbjvP9OBtU= From: Michael Walle To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michael Turquette , Stephen Boyd , Rob Herring , Shawn Guo , Li Yang , "Y . b . Lu" , Xiaowei Bao , Ashish Kumar , Vladimir Oltean , Michael Walle Subject: [RFC PATCH v3 9/9] arm64: dts: lx2160a: fix FlexSPI clock Date: Sun, 8 Nov 2020 19:51:13 +0100 Message-Id: <20201108185113.31377-10-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201108185113.31377-1-michael@walle.cc> References: <20201108185113.31377-1-michael@walle.cc> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now that we have a proper driver for the FlexSPI interface use it. This will fix SCK frequency switching on Layerscape SoCs. Signed-off-by: Michael Walle --- Thanks to Vladimir Oltean, this was partially tested on a LX2160A RDB. But this patch is marked as RFC nonetheless, because there is too much difference in the clock tree between LS1028A and LX2160A. It would be nice if someone could test it and add a Tested-by. Changes since v2: - none Changes since v1: - none arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index 0a54a54ec770..130de5f7ff5e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -661,9 +661,20 @@ }; dcfg: syscon@1e00000 { - compatible = "fsl,lx2160a-dcfg", "syscon"; + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,lx2160a-dcfg", "syscon", "simple-mfd"; reg = <0x0 0x1e00000 0x0 0x10000>; + ranges = <0x0 0x0 0x1e00000 0x10000>; little-endian; + + fspi_clk: clock-controller@900 { + compatible = "fsl,lx2160a-flexspi-clk"; + reg = <0x900 0x4>; + #clock-cells = <0>; + clocks = <&clockgen 4 0>; + clock-output-names = "fspi_clk"; + }; }; tmu: tmu@1f80000 { @@ -778,7 +789,7 @@ <0x0 0x20000000 0x0 0x10000000>; reg-names = "fspi_base", "fspi_mmap"; interrupts = ; - clocks = <&clockgen 4 3>, <&clockgen 4 3>; + clocks = <&clockgen 4 3>, <&fspi_clk>; clock-names = "fspi_en", "fspi"; status = "disabled"; };