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[109.252.192.83]) by smtp.gmail.com with ESMTPSA id m6sm640725ljc.112.2020.11.04.15.45.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Nov 2020 15:45:34 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Alan Stern , Peter Chen , Mark Brown , Liam Girdwood , Adrian Hunter , Krzysztof Kozlowski , Greg Kroah-Hartman , Lee Jones , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Ulf Hansson , Mauro Carvalho Chehab , Rob Herring , Marek Szyprowski , Peter Geis , Nicolas Chauvet Cc: linux-samsung-soc@vger.kernel.org, devel@driverdev.osuosl.org, linux-usb@vger.kernel.org, linux-pwm@vger.kernel.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-media@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 28/30] ARM: tegra: acer-a500: Add voltage supplies to DVFS-capable devices Date: Thu, 5 Nov 2020 02:44:25 +0300 Message-Id: <20201104234427.26477-29-digetx@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201104234427.26477-1-digetx@gmail.com> References: <20201104234427.26477-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add voltage supplies to DVFS-capable devices in order to enable system-wide voltage scaling and allow CORE/RTC regulators to go lower. Signed-off-by: Dmitry Osipenko --- .../boot/dts/tegra20-acer-a500-picasso.dts | 30 +++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts index b4ed88802387..5ab6872cd84c 100644 --- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts @@ -60,7 +60,19 @@ linux,cma@30000000 { }; host1x@50000000 { + core-supply = <&vdd_core>; + + gr2d@54140000 { + core-supply = <&vdd_core>; + }; + + gr3d@54180000 { + core-supply = <&vdd_core>; + }; + dc@54200000 { + core-supply = <&vdd_core>; + rgb { status = "okay"; @@ -73,12 +85,17 @@ lcd_output: endpoint { }; }; + dc@54240000 { + core-supply = <&vdd_core>; + }; + hdmi@54280000 { status = "okay"; vdd-supply = <&hdmi_vdd_reg>; pll-supply = <&hdmi_pll_reg>; hdmi-supply = <&vdd_5v0_sys>; + core-supply = <&vdd_core>; nvidia,ddc-i2c-bus = <&hdmi_ddc>; nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) @@ -86,6 +103,10 @@ hdmi@54280000 { }; }; + vde@6001a000 { + core-supply = <&vdd_core>; + }; + pinmux@70000014 { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -565,7 +586,7 @@ sys_reg: sys { vdd_core: sm0 { regulator-name = "vdd_sm0,vdd_core"; - regulator-min-microvolt = <1200000>; + regulator-min-microvolt = <950000>; regulator-max-microvolt = <1300000>; regulator-coupled-with = <&rtc_vdd &vdd_cpu>; regulator-coupled-max-spread = <170000 550000>; @@ -606,7 +627,7 @@ ldo1 { rtc_vdd: ldo2 { regulator-name = "vdd_ldo2,vdd_rtc"; - regulator-min-microvolt = <1200000>; + regulator-min-microvolt = <950000>; regulator-max-microvolt = <1300000>; regulator-coupled-with = <&vdd_core &vdd_cpu>; regulator-coupled-max-spread = <170000 550000>; @@ -696,6 +717,7 @@ usb@c5000000 { compatible = "nvidia,tegra20-udc"; status = "okay"; dr_mode = "peripheral"; + core-supply = <&vdd_core>; }; usb-phy@c5000000 { @@ -709,6 +731,7 @@ usb-phy@c5000000 { usb@c5008000 { status = "okay"; + core-supply = <&vdd_core>; }; usb-phy@c5008000 { @@ -746,6 +769,7 @@ sdmmc1: mmc@c8000000 { non-removable; mmc-pwrseq = <&brcm_wifi_pwrseq>; + core-supply = <&vdd_core>; vmmc-supply = <&vdd_3v3_sys>; vqmmc-supply = <&vdd_3v3_sys>; @@ -764,6 +788,7 @@ sdmmc3: mmc@c8000400 { bus-width = <4>; cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; + core-supply = <&vdd_core>; vmmc-supply = <&vdd_3v3_sys>; vqmmc-supply = <&vdd_3v3_sys>; }; @@ -771,6 +796,7 @@ sdmmc3: mmc@c8000400 { sdmmc4: mmc@c8000600 { status = "okay"; bus-width = <8>; + core-supply = <&vdd_core>; vmmc-supply = <&vcore_emmc>; vqmmc-supply = <&vdd_3v3_sys>; non-removable;