From patchwork Thu Oct 29 03:37:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 314771 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11EC6C5517A for ; Thu, 29 Oct 2020 11:58:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A96F0207DE for ; Thu, 29 Oct 2020 11:58:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="WqCROURv" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725914AbgJ2L6p (ORCPT ); Thu, 29 Oct 2020 07:58:45 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38516 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725833AbgJ2L6o (ORCPT ); Thu, 29 Oct 2020 07:58:44 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 09T3cQqm077992; Wed, 28 Oct 2020 22:38:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1603942706; bh=HinR9Fr1D+40vJlamsjveSzARvEa/8s7iLKG6PABfto=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=WqCROURvd6QswmGgxu4Qk8mknWIqnFKKTnynyKzkBovDgyI8tn+WeeDI4027MLDoK hl0mADXMslCpp4YUQxvED1IjDlKiEYLk6ahlSS9w7izJmPE7fMH3r6vqe/3SSgnQ0Q 0swBS4aSf3ZNrr1Zr0qIbTJ5ttDgEUT7HgSBk5nY= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 09T3cQPG122766 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 28 Oct 2020 22:38:26 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 28 Oct 2020 22:38:25 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 28 Oct 2020 22:38:25 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 09T3cPOO101663; Wed, 28 Oct 2020 22:38:25 -0500 Received: from localhost ([10.250.39.72]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 09T3cPSp113561; Wed, 28 Oct 2020 22:38:25 -0500 From: Suman Anna To: Nishanth Menon , Tero Kristo CC: Lokesh Vutla , , , Suman Anna Subject: [PATCH 2/8] arm64: dts: ti: k3-am654-base-board: Add mailboxes to R5Fs Date: Wed, 28 Oct 2020 22:37:56 -0500 Message-ID: <20201029033802.15366-3-s-anna@ti.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201029033802.15366-1-s-anna@ti.com> References: <20201029033802.15366-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the required 'mboxes' property to both the R5F processors on all the TI K3 AM65x boards. The mailboxes and some shared memory are required for running the Remote Processor Messaging (RPMsg) stack between the host processor and each of the R5Fs. The chosen sub-mailboxes match the values used in the current firmware images. This can be changed, if needed, as per the system integration needs after making appropriate changes on the firmware side as well. Note that the R5F Core1 resources are needed and used only when the R5F cluster is configured for Split-mode. Signed-off-by: Suman Anna --- arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index d12dd89f3405..0cb5b9cb65ba 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; @@ -441,6 +441,14 @@ &mailbox0_cluster11 { status = "disabled"; }; +&mcu_r5fss0_core0 { + mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; +}; + +&mcu_r5fss0_core1 { + mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>; +}; + &ospi0 { pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;