From patchwork Mon Oct 12 13:17:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317634 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4616857ilm; Mon, 12 Oct 2020 06:20:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzbdYkQXd5vxGsP3GDrRtYd0iee/9iqruWo1DWgvi8ZU2NQ89AN2YknIvGdEUTEGVPxqoZx X-Received: by 2002:a17:906:39ce:: with SMTP id i14mr29281519eje.170.1602508806371; Mon, 12 Oct 2020 06:20:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602508806; cv=none; d=google.com; s=arc-20160816; b=IkVoedtNZJszZ8xPLv4twUfaSpQ7GnmZY65lkezg/OBrigePytAdGE0zPttaI4zYeC bfiiycDjSchsg2KHS1vuMWUyInhvZDGGf4IkSPigkrPRR/ucl43eXEmvOsC3mOjAtd9k Jt6iOPx2+1hYu3LjN98uICUPwEQMKiyueRDcNPNVHWW+2sM730CasVhrZk0qOGuqJcMj y6toAdL7EyJs3dKTuBjQ/ZMlKJCeHE3ZGNhTmJj7zGNRgNXmehNAX1oCZQ/R+yzwRTss hbSmfi2jMGWFwyJeGuyQAID6CAawdClaFp549/r9DZd79u/2YVE8QjY158cQpXpCRIE5 v+sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=wnnYzRHbTfbV/cwPl+rBglFCy11IV9Ol/tPQ5St+SQ4=; b=Iw6Bsdl/EDomX1ZgG+H98La7iMhbMJw+2VBAiOcEYgPfr9S22ZW+2Pu7kFJZAWeIKc T88+kzyqybMthMZXxPZvU4/fnjGeQgMNFfzc+UiY99QABu23x1Ds2vnPIvXx3dUTnIs+ 34eVbLpdKfewuUkEGv7NSdGmnaIcL+oDssTPHM+AQdSt6KdFZeLv3KOYDTb88PfQDMvR dV4Bh+c0oRRiPkl57id0ksAKKqgFzyyakK4h/MLPvHsgSMesHnFRZ9OphpX0kIr2/gkV olVHockJ52qpkpuqiB8Fa+fb+GNyn485bPMYnKxDwvwEUjEVxNN0vuWwUJjeyBIYXpaX gBrg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dp1si12424524ejc.606.2020.10.12.06.20.06; Mon, 12 Oct 2020 06:20:06 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388971AbgJLNUB (ORCPT + 6 others); Mon, 12 Oct 2020 09:20:01 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:56884 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2387930AbgJLNTo (ORCPT ); Mon, 12 Oct 2020 09:19:44 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 9C3D8C0B8A6EB6466787; Mon, 12 Oct 2020 21:19:35 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 21:19:27 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 08/11] arm64: dts: hisilicon: normalize the node name of the UART devices Date: Mon, 12 Oct 2020 21:17:36 +0800 Message-ID: <20201012131739.1655-9-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012131739.1655-1-thunder.leizhen@huawei.com> References: <20201012131739.1655-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Change the node name of the UART devices to match "^serial(@[0-9a-f,]+)*$". Signed-off-by: Zhen Lei --- arch/arm64/boot/dts/hisilicon/hip05.dtsi | 4 ++-- arch/arm64/boot/dts/hisilicon/hip06.dtsi | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) -- 1.8.3 diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi index f7e3a7af4634233..26caf09e9511b3c 100644 --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi @@ -296,7 +296,7 @@ clock-frequency = <200000000>; }; - uart0: uart@80300000 { + uart0: serial@80300000 { compatible = "snps,dw-apb-uart"; reg = <0x0 0x80300000 0x0 0x10000>; interrupts = ; @@ -307,7 +307,7 @@ status = "disabled"; }; - uart1: uart@80310000 { + uart1: serial@80310000 { compatible = "snps,dw-apb-uart"; reg = <0x0 0x80310000 0x0 0x10000>; interrupts = ; diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi index 2d401d74a01f8b9..7980709e21ff020 100644 --- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi @@ -359,7 +359,7 @@ status = "disabled"; }; - uart0: lpc-uart@2f8 { + uart0: serial@2f8 { compatible = "ns16550a"; clock-frequency = <1843200>; reg = <0x01 0x2f8 0x08>;