From patchwork Sun Sep 27 06:21:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313589 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp2398171ilg; Sat, 26 Sep 2020 23:27:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxF8Fo6Q1j0GxAFDhsUEZn1Ieb99r5gd53a+Qexu5oKqfucD2UfwLFT8TSGbDwxm42zFBDM X-Received: by 2002:a50:ef0c:: with SMTP id m12mr9511767eds.264.1601188066512; Sat, 26 Sep 2020 23:27:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1601188066; cv=none; d=google.com; s=arc-20160816; b=kxFBSY1vhBrRpVH4J8XkMecOiyqNwfXQCGU649MdK5uIghZegMfEdeAvJe7INSBxEg fWY5oXqwMuINemsaR7Nr3/zSo+ixqN3PBNwz/T11wxJhVicfu2I/dc4Rh1246Utkzw+a /VreeDSRO8Clj8TRxv3zPK6NOICpU7SEje9JwWS/0vu0FEiHHBzCbpp3ssqwMOJXgt+P k0FeX3uHm0GHBChDj/zNKHfZX8p7UJxCtyKAarMMTxCEcw1dJD9tAQ/wNbHaQVnDROHU Bu5QgcENeuFk4ps5OMtT6M5aokzwwS34nt1Vyw2U0m0AY9dpGCxTIPLLx65bqgvyvqNO P9mQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=3UwjV0L2Xew+PXu+SiCQh+Tj88fbhVx6a7rFDmDm9D4=; b=hYDqeazK8I0HgP/QdxWEQTWleQl8506zKSHWCm+nVUdHxB9vUCMt42j2UxXH5/rZyi G4IICUhRWfo/dRyWvPGcfMywP+GTyKRcwhfLycqz4Z+gvuw3mO6umDMG2X0tFMHfrfBS p7uBEVpYdYRdjwuE7WXRplOkMGrI5CpGfNyo+NmhqDOkS35ZWK65vbCyXx4U5TZ4GUmW Y4wCKzTlgEtQClO9mzDlINADRRacnHzB+dBlkUxnEjnzGIqduj+nx/X4RbzbtRYdBhqT x3oxv15HI9PxMK6aPn4ENDHfuLoIQVAkZkkvtW3ADQrauImwot+JAOEas1GR5A11IqrB xkgQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id e25si5050492ejb.260.2020.09.26.23.27.46; Sat, 26 Sep 2020 23:27:46 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730508AbgI0G1p (ORCPT + 6 others); Sun, 27 Sep 2020 02:27:45 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:14296 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730393AbgI0G1A (ORCPT ); Sun, 27 Sep 2020 02:27:00 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id B27CDDA9EFB4BC5EB9C9; Sun, 27 Sep 2020 14:26:57 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.487.0; Sun, 27 Sep 2020 14:26:49 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang Subject: [PATCH v3 14/21] dt-bindings: arm: hisilicon: convert hisilicon, dsa-subctrl bindings to json-schema Date: Sun, 27 Sep 2020 14:21:22 +0800 Message-ID: <20200927062129.4573-15-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200927062129.4573-1-thunder.leizhen@huawei.com> References: <20200927062129.4573-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the Hisilicon HiP05/HiP06 DSA subsystem controller binding to DT schema format using json-schema. Signed-off-by: Zhen Lei --- .../hisilicon/controller/hisilicon,dsa-subctrl.txt | 15 --------- .../controller/hisilicon,dsa-subctrl.yaml | 37 ++++++++++++++++++++++ 2 files changed, 37 insertions(+), 15 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.yaml -- 1.8.3 diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.txt deleted file mode 100644 index 88f81760ddc8621..000000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.txt +++ /dev/null @@ -1,15 +0,0 @@ -Hisilicon HiP05/HiP06 DSA sub system controller - -Required properties: -- compatible : "hisilicon,dsa-subctrl", "syscon"; -- reg : Register address and size - -The DSA sub system controller is shared by peripheral controllers in -HiP05 or HiP06 Soc to implement some basic configurations. - -Example: - /* for HiP05 dsa sub system */ - pcie_sas: system_controller@a0000000 { - compatible = "hisilicon,dsa-subctrl", "syscon"; - reg = <0xa0000000 0x10000>; - }; \ No newline at end of file diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.yaml new file mode 100644 index 000000000000000..f5dabeede5cff26 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,dsa-subctrl.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hisilicon,dsa-subctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon HiP05/HiP06 DSA subsystem controller + +maintainers: + - Wei Xu + +description: | + The DSA sub system controller is shared by peripheral controllers in + HiP05 or HiP06 Soc to implement some basic configurations. + +properties: + compatible: + items: + - const: hisilicon,dsa-subctrl + - const: syscon + + reg: + description: Register address and size + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + /* for HiP05 dsa sub system */ + pcie_sas: system_controller@a0000000 { + compatible = "hisilicon,dsa-subctrl", "syscon"; + reg = <0xa0000000 0x10000>; + }; +... \ No newline at end of file