From patchwork Sat Sep 19 12:44:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 313305 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp2134234ilg; Sat, 19 Sep 2020 05:45:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzeiDwdO6x7tcipvUQJ7AgwxOXhVoAWLH5LCZ4x23AS18VN+yD5rKysmBKM7BVbX4LWPmwo X-Received: by 2002:a50:f102:: with SMTP id w2mr44397393edl.63.1600519527461; Sat, 19 Sep 2020 05:45:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600519527; cv=none; d=google.com; s=arc-20160816; b=hZKXnPkCiLeMMSzmuFZek9UztosnZrD15DTr/7DWxp0UFNwgKI58nivNlorkLMRYjv MEYJWLpNd9Y54rlWNOp90NBkYi5Rb9altMx6ZTRF/+cjaGxF0CsBmnb8/PYl/mkYQPTe Wr/wF/qP6KpAT6Z01NQj1MEP71hjz39S5SwqxsWYlS7c+mZwkdVL+9f5qOmgXYQMDsu0 d6wqeLgJxw6KfRVQb6+QCKII7786e6K7bLGvFUW593LiuepJF+ZRN/V0Flsh1ayF8SjB TE4aWz6orwF7vrIgUYWhp91gyb01fOxmjplv99Bacyja9UrZdlKgubu3Q00fqxVLMZFw hJmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=t7Ejn1ziRKSNxMjaE8mhYs/nrthh0uYRkkDYaqKmiwk=; b=Ei3ZaP/tXxDAFWiD8o58k6N2WgNuKzhfYSYTSU//Lf+BvboNJrMzZWwu9m8xhyh/p9 OyzfZd+Fwe3Uk83Ut5aRj5nriqcgxr8XSYwjNwu/cif1ZcPuJaUtQwbyXLo2O96w3uQ4 /qZ3W9HLxbWGVz+8FkMMdfhsgB4xDN8YmaSNfMXfZ+IiU6trbMjdn1u3PTuUdkn5FMYn qJGO9nnnlBZA59QYTnlz3Q26AXYFweNmlpvyGdLHEzEjbgphg9pdj1OWVixx480nuiHo QWHRSUrsPZ2o9/0ObGqCRNr3g4XMb7+LX6+bDBdYqFN4vmeROxjqpRQvQvq3WFbPgXM6 gAjw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r8si4562597ejo.510.2020.09.19.05.45.27; Sat, 19 Sep 2020 05:45:27 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726385AbgISMpH (ORCPT + 6 others); Sat, 19 Sep 2020 08:45:07 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:39996 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726218AbgISMpG (ORCPT ); Sat, 19 Sep 2020 08:45:06 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id D81B814E6D6CAD530CEB; Sat, 19 Sep 2020 20:45:02 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Sat, 19 Sep 2020 20:44:56 +0800 From: Zhen Lei To: devicetree , Daniel Lezcano , Thomas Gleixner , "Haojian Zhuang" , Andrew Morton , Russell King , Catalin Marinas , linux-arm-kernel , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang Subject: [PATCH 1/1] dt-bindings: sp804: add support for Hisilicon sp804 timer Date: Sat, 19 Sep 2020 20:44:12 +0800 Message-ID: <20200919124412.4135-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200919124412.4135-1-thunder.leizhen@huawei.com> References: <20200919124412.4135-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some Hisilicon SoCs, such as Hi1212, use the Hisilicon extended sp804 timer. Signed-off-by: Zhen Lei --- Documentation/devicetree/bindings/timer/arm,sp804.yaml | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.yaml b/Documentation/devicetree/bindings/timer/arm,sp804.yaml index ba0945cf799ee0b..e35d3053250a557 100644 --- a/Documentation/devicetree/bindings/timer/arm,sp804.yaml +++ b/Documentation/devicetree/bindings/timer/arm,sp804.yaml @@ -15,19 +15,26 @@ description: |+ free-running mode. The input clock is shared, but can be gated and prescaled independently for each timer. + There is a viriant of Arm SP804: Hisilicon 64-bit SP804 timer. Some Hisilicon + SoCs, such as Hi1212, should use the dedicated compatible: "hisilicon,sp804". + # Need a custom select here or 'arm,primecell' will match on lots of nodes select: properties: compatible: contains: - const: arm,sp804 + oneOf: + - const: arm,sp804 + - const: hisilicon,sp804 required: - compatible properties: compatible: items: - - const: arm,sp804 + - enum: + - arm,sp804 + - hisilicon,sp804 - const: arm,primecell interrupts: