From patchwork Sat Sep 19 06:45:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313299 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1932523ilg; Fri, 18 Sep 2020 23:46:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxmkCvNBHR97tlXgZUrlTkcJvWWZOzd7o62mkt1iT863+88o77vuboEesmfaWUK/Vcs7eUN X-Received: by 2002:a17:906:fa8a:: with SMTP id lt10mr39115505ejb.307.1600497997879; Fri, 18 Sep 2020 23:46:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600497997; cv=none; d=google.com; s=arc-20160816; b=WkZ0NyDgbwhJTvVFpuTYemjd04ukbAQ7CpQElH3CZ7l9GMB6lp1ab1hn2E5+n7W0+0 PmaAspAgciodVVSYmZ5EpYfEuDbIqJJPo9mqMFlX+Aq/fl8XECjmgQKnM5Daj+HSeW/W ymAHFSx3PZ4pr5PQsR+hBuCheuvnzSRCJqBBJIvIhqsvlD005GxkAHPaZr0AtxDR1pC3 Noq6gtZBEvubXrkkukBImCJeb6t9Gf9zbOMw6LR7jEbcOcNBghWX8XW7mEoAYthdMPCL 9a90yd7dNmqvtVw5lqn6yFoICdXIPHjOAITjbclElgKzEaozzz+rQ/VOPogR0i75VSlY z44Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=7S2NxD+MhlhEdXZBEzBKVlIncr3e0pL4ulB33Jw88Vg=; b=FbqZ0pcN56HxZKACMN47RFNpjyJwzaO/IhdpupnRHtX/mZb+RxImDt1sJ76xmMnBsb UvUkfOobj/BdCUvVmADPHbB2U4b7F1c+KtYle6MKJBioGlq+Irdx6RSl0fyY4eZvdPyI 6R1ZDRhl82C76xs4CKHV96ohrD0Pc8yxhajB/G2s3JVYWhBnzZHhGfQGTaGpZtBcaHvd vC+hrfqeFlG49amb9+TBnf2JJbm734beMrIENl5ht7zrAiIZodn+PdNxY4VityyLuaMs HB7CLp6bwdD9B8XshFrTZRVD0s3pdZZwDG0UIS931V9/6zHOZZHaLVcz/hJzgNpibDqi UvIA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r15si3837930edo.318.2020.09.18.23.46.37; Fri, 18 Sep 2020 23:46:37 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726112AbgISGqg (ORCPT + 6 others); Sat, 19 Sep 2020 02:46:36 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:33150 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726054AbgISGqd (ORCPT ); Sat, 19 Sep 2020 02:46:33 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 9A9E5726B9C783EBAADF; Sat, 19 Sep 2020 14:46:29 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Sat, 19 Sep 2020 14:46:20 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang Subject: [PATCH v2 2/4] ARM: hisi: add support for SD5203 SoC Date: Sat, 19 Sep 2020 14:45:53 +0800 Message-ID: <20200919064555.3616-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200919064555.3616-1-thunder.leizhen@huawei.com> References: <20200919064555.3616-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Kefeng Wang Enable support for the Hisilicon SD5203 SoC. The core is ARM926EJ-S. Signed-off-by: Kefeng Wang Signed-off-by: Zhen Lei --- arch/arm/mach-hisi/Kconfig | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig index 3b010fe7c0e9b48..2e980f834a6aa1b 100644 --- a/arch/arm/mach-hisi/Kconfig +++ b/arch/arm/mach-hisi/Kconfig @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only config ARCH_HISI bool "Hisilicon SoC Support" - depends on ARCH_MULTI_V7 + depends on ARCH_MULTI_V7 || ARCH_MULTI_V5 select ARM_AMBA - select ARM_GIC + select ARM_GIC if ARCH_MULTI_V7 select ARM_TIMER_SP804 select POWER_RESET select POWER_RESET_HISI @@ -15,6 +15,7 @@ menu "Hisilicon platform type" config ARCH_HI3xxx bool "Hisilicon Hi36xx family" + depends on ARCH_MULTI_V7 select CACHE_L2X0 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP @@ -25,6 +26,7 @@ config ARCH_HI3xxx config ARCH_HIP01 bool "Hisilicon HIP01 family" + depends on ARCH_MULTI_V7 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP select ARM_GLOBAL_TIMER @@ -33,6 +35,7 @@ config ARCH_HIP01 config ARCH_HIP04 bool "Hisilicon HiP04 Cortex A15 family" + depends on ARCH_MULTI_V7 select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER select MCPM if SMP @@ -43,6 +46,7 @@ config ARCH_HIP04 config ARCH_HIX5HD2 bool "Hisilicon X5HD2 family" + depends on ARCH_MULTI_V7 select CACHE_L2X0 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP @@ -50,6 +54,14 @@ config ARCH_HIX5HD2 select PINCTRL_SINGLE help Support for Hisilicon HIX5HD2 SoC family + +config ARCH_SD5203 + bool "Hisilicon SD5203 family" + depends on ARCH_MULTI_V5 + select DW_APB_ICTL + help + Support for Hisilicon SD5203 SoC family + endmenu endif