From patchwork Fri Sep 4 06:36:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 249058 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp1124220ilg; Thu, 3 Sep 2020 23:37:44 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzEAY1rH176GHWpknn8zgy6CPldYBJdDWaVE9QQiLUHuE1px+4U//UzNpYZH+LmJc9MJZuo X-Received: by 2002:a05:6402:2d9:: with SMTP id b25mr7021616edx.131.1599201464421; Thu, 03 Sep 2020 23:37:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599201464; cv=none; d=google.com; s=arc-20160816; b=MG6kF0ah0xmubL9WXH1OrtPIFVfgBmF2lEVo6YnyokZH9q+ev42xxAEnHOMnKH5MtP 4RDkvIyqrXUWt+3H5YuJMZLeH525do9TddctGezMgs6OtSwNIQPEmtW7+g6XIQMqU/Wh 1QK7B6UIgLAsDXqjGrC2VZSRvfDtqdoGHoC4R+7eOrOmOfaS20XMM8GCFurKDQY6Jtok DbA24BvS8FcdXqVu/sSKTmD7cHa5kNICBtTh8878s9xLO9wUNaHWu1lvmrfOttotm6Ko 9fjpaBtJdH8Nr65yz+nYm+BjTrj90VRCB5oa9Lp7rOj/Sa9mRMw32S1wnHGBHqCD/zx/ w5xQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=IE9lC/ixMfDRzfRHZzChsL/a0bDv+YouA1+ToO8AWbs=; b=a3oHsKbmnZiWzkzhwJX2XUgcaXbDEpVgqXWa6NKBOllgm00V97Irq3Ypwp1JmyOfyQ FQtZjVSB17TXIIyns/obOAyIvOVo+FU5ubNZkyuze2uJ6XXN8WcvaAG7fbHYnue6Pma4 W3KyuoyWQHjwdwGMU40oK9w0s7TuApftxu7CUIJx08lOMi8FATpYJRUjA0ZC4C2f2Mzk MSR6NqzDgX9HoMwImQ8a+vrusecSfRiJ7c7C64cGl8InJlS5gcggNNkgWQFmv+w7kwDv ZLyq+a8kiLlH/1IPd6ma+vAuGxNg6ZtMumT5LLQG6dW+5UuvsS5PJ8d1HVmYfoFm4fhm Wckg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P711tSb8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a12si3376885ejd.417.2020.09.03.23.37.44; Thu, 03 Sep 2020 23:37:44 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P711tSb8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728167AbgIDGhm (ORCPT + 6 others); Fri, 4 Sep 2020 02:37:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728166AbgIDGg6 (ORCPT ); Fri, 4 Sep 2020 02:36:58 -0400 Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97F7DC06124F for ; Thu, 3 Sep 2020 23:36:55 -0700 (PDT) Received: by mail-pj1-x1041.google.com with SMTP id b17so457249pji.1 for ; Thu, 03 Sep 2020 23:36:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IE9lC/ixMfDRzfRHZzChsL/a0bDv+YouA1+ToO8AWbs=; b=P711tSb8oZkiFFHqJquyTmI1rawAgNdQXCfBhLwlW44YmlFr/yIJYbHmRasZ6QdRX+ 8aZTXKdEwLxq0AFqBaJ1OU0oikaP/MNpv8jtKgy3hIYY8zvIr/TlvHgojDVxL5Dm1je9 risAO3AgTP7W/vWG94KI3XEzFmEmq/XlUaOjfw9Bh325kRkX8fgFxXh/OBpUFTnMwAIE BDkys3h13VwEBtabYHEvyN8A1rNqkY/ETRPPGSsLEF0hxwJPhC3nZAJpzzE0n9VLIFmu DNx1So9l2+TvJRT//p0mlCyJacFMvCr7rdKbbKK8S77kU9mTSexv/MlHGauk9eVZUmgZ LQpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IE9lC/ixMfDRzfRHZzChsL/a0bDv+YouA1+ToO8AWbs=; b=tzM/iPEWaKPeEdrqVspDS2CnyjkCnLTvvwhML1IIncvrN1w6R9GB0HcngNCboI47hC sOiBfdNf1Ni9WHcNDJPyNn2Gyn6cpNA+CVjIXek168AX8oHADmuIK59rhNClPPbC7ECG flbaMqhw8Vvxtv0+LjVF2VppAKZM2opdiPHjJxqOF1++OVlrpRynlry6j20Tz9qlyvwh CSKpK90141lRKCnw3c11xbJWy1/4AQdBlUexGoxI3qebbFG6RmEbNuMyj50CB6ak5J69 wbTcxMlUMnYKWN2mtfmDdK0sDTi804+0g/TGdSvy3eAm3lxpM2ReFvHDG4scE8wpOXLJ t8hw== X-Gm-Message-State: AOAM532fNQ275sY/5+6NsEtsYqsVFQ9ve43rDh/WPVL8PyopG2pMXstf TGLdjHR16vJlM4v3x4cQmmCR X-Received: by 2002:a17:90a:dd45:: with SMTP id u5mr6895996pjv.198.1599201415111; Thu, 03 Sep 2020 23:36:55 -0700 (PDT) Received: from localhost.localdomain ([103.59.133.81]) by smtp.googlemail.com with ESMTPSA id 143sm5315040pfc.66.2020.09.03.23.36.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Sep 2020 23:36:54 -0700 (PDT) From: Manivannan Sadhasivam To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmitry.baryshkov@linaro.org, Manivannan Sadhasivam Subject: [PATCH 2/6] arm64: dts: qcom: sm8250: Rename UART2 node to UART12 Date: Fri, 4 Sep 2020 12:06:33 +0530 Message-Id: <20200904063637.28632-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200904063637.28632-1-manivannan.sadhasivam@linaro.org> References: <20200904063637.28632-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The UART12 node has been mistakenly mentioned as UART2. Let's fix that for both SM8250 SoC and MTP board and also add pinctrl definition for it. Fixes: 60378f1a171e ("arm64: dts: qcom: sm8250: Add sm8250 dts file") Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 4 ++-- arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 ++++++++++- 2 files changed, 12 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts index 6894f8490dae..6e2f7ae1d621 100644 --- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts @@ -17,7 +17,7 @@ compatible = "qcom,sm8250-mtp"; aliases { - serial0 = &uart2; + serial0 = &uart12; }; chosen { @@ -371,7 +371,7 @@ gpio-reserved-ranges = <28 4>, <40 4>; }; -&uart2 { +&uart12 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 377172e8967b..e7d139e1a6ce 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -935,11 +935,13 @@ status = "disabled"; }; - uart2: serial@a90000 { + uart12: serial@a90000 { compatible = "qcom,geni-debug-uart"; reg = <0x0 0x00a90000 0x0 0x4000>; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart12_default>; interrupts = ; status = "disabled"; }; @@ -1880,6 +1882,13 @@ bias-disable; }; }; + + qup_uart12_default: qup-uart12-default { + mux { + pins = "gpio34", "gpio35"; + function = "qup12"; + }; + }; }; adsp: remoteproc@17300000 {