From patchwork Mon Aug 24 19:06:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 253436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C88BC433E1 for ; Mon, 24 Aug 2020 19:07:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 37BEA2074D for ; Mon, 24 Aug 2020 19:07:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598296040; bh=D49DFnKwX3H2+4/JHutRBjl6onsdr+JMHUvotdX4JOA=; h=From:To:Cc:Subject:Date:List-ID:From; b=yGYv2SWiDs9d2HkMd4fscec2otwpX4YbeK0g/ZPAkjCxyatnWkK+4PX6CSe3Wnjss eZjTLhKpT51zBzU7kQpQsS0T96+zhmH29nsitjmliK49xp9OLAfcCKTDm7kAz7qrmC OnRLpPLI+UPjalUoEIsGwFiiVR6UMxhGqaeITGKs= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726631AbgHXTHT (ORCPT ); Mon, 24 Aug 2020 15:07:19 -0400 Received: from mail.kernel.org ([198.145.29.99]:56944 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725904AbgHXTHQ (ORCPT ); Mon, 24 Aug 2020 15:07:16 -0400 Received: from kozik-lap.mshome.net (unknown [194.230.155.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DF8FC2074D; Mon, 24 Aug 2020 19:07:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598296035; bh=D49DFnKwX3H2+4/JHutRBjl6onsdr+JMHUvotdX4JOA=; h=From:To:Cc:Subject:Date:From; b=xroCTR8eKxl6V1lvgh/HrBdL5yumIzn+QzqCpV0HmoTNHLBcd3BOlUqvYqiQ83PtV +jE0X2cY7O73uflWwXcWluqNlVZ9SdesRA885D2C0dd3UtzB5zoCx2kjOhk6I+djzV DXQeTZZ+iNeRWQbKb9Y2vaA8SQNF3ozNUVvJU0vc= From: Krzysztof Kozlowski To: Lee Jones , Rob Herring , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Adam Ford , Daniel Baluta , Anson Huang , Robin Gong , Li Jun , Matti Vaittinen , Han Xu , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Krzysztof Kozlowski Subject: [PATCH 01/16] dt-bindings: mfd: rohm, bd71847-pmic: Correct clock properties requirements Date: Mon, 24 Aug 2020 21:06:46 +0200 Message-Id: <20200824190701.8447-1-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The input clock and number of clock provider cells are not required for the PMIC to operate. They are needed only for the optional bd718x7 clock driver. Add also clock-output-names as driver takes use of it. This fixes dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dt.yaml: pmic@4b: 'clocks' is a required property arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dt.yaml: pmic@4b: '#clock-cells' is a required property Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/mfd/rohm,bd71847-pmic.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml index 77bcca2d414f..5d531051a153 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml @@ -38,6 +38,9 @@ properties: "#clock-cells": const: 0 + clock-output-names: + maxItems: 1 + # The BD71847 abd BD71850 support two different HW states as reset target # states. States are called as SNVS and READY. At READY state all the PMIC # power outputs go down and OTP is reload. At the SNVS state all other logic @@ -116,12 +119,14 @@ required: - compatible - reg - interrupts - - clocks - - "#clock-cells" - regulators additionalProperties: false +dependencies: + '#clock-cells': [clocks] + clocks: ['#clock-cells'] + examples: - | #include