From patchwork Thu Jul 23 15:26:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 247088 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp1587035ilg; Thu, 23 Jul 2020 08:27:02 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwDUIKDdd9Qei1+pJWAF34EJWKt14HRQGWv009z1mPebWwqIFOh5DGtB2FtvCVuNGjD1q5U X-Received: by 2002:a17:906:488b:: with SMTP id v11mr5011356ejq.173.1595518022579; Thu, 23 Jul 2020 08:27:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1595518022; cv=none; d=google.com; s=arc-20160816; b=ilELSvE+BjgTQzAkvmivq7F+xn5CINuzzkd+hoMJZRQ7q92/6wygmIHlnrmEzMdvtu UsFZ3RgeUbOw4QXqd28au18OJaT8g928ymRFJ38GdyG8StoYpbYN431e5jSE14ZvWmos 61jo3r9rPaJsedKB67Cgl5xwBuDUwfGTY3II3v+i/xU/IMbMF2hWYGUAeu3iZeS7pVfQ 3QwdjJar1wPLGiqDd9mVeCAJmaEzjHKa3w7yMkrpMfhyv0RBxCflW++Xu1j1Q7wCMBeX imu1miNOtWn/X8CBeXsRH16DnNJt5Drcs+oxAjlh6dvYAMQ5qhAqlH5Nd51RpId1azXE cYVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=R3Az9OepR2BdTDAPEdWN7LwMsA5P61TmIGuTZB4zgG8=; b=QfqP71HS/pQpOalQEZhpQJ0WWS8tA8Mv7wljl3E1Rc5O4Q4FzZNaKyCpAjXAyj5loF ChNDl0ZfvmSIQHfz/IVaiG1egldcfdkiVaXj2VE+qvDuK7NxMGLpj0NCgWO9dPpSrhQI 2uJOKmOBmsdLGp7R35gsIIigPANtL1I9hqJWl2hG58EJAcgGbjR14hZmYw/c+q8vo+VS IR4nRK7lNGoz3m3VBx9Fi4maRTYhPtilgguIEr7iD1ZjqiUYpPKLOL7VwQNs4LLx+Mb2 q5yF/VbNKT6MX0BeE4l6bjyUKd5ltzw5C7LGeeXYLLFqyM9oumZEGzY5dfaN2EB6qvn3 ykJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dQ0bNcNH; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c25si2090141edw.141.2020.07.23.08.27.02; Thu, 23 Jul 2020 08:27:02 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dQ0bNcNH; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729591AbgGWP1A (ORCPT + 6 others); Thu, 23 Jul 2020 11:27:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58196 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729588AbgGWP06 (ORCPT ); Thu, 23 Jul 2020 11:26:58 -0400 Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 963BAC0619E2 for ; Thu, 23 Jul 2020 08:26:58 -0700 (PDT) Received: by mail-wr1-x444.google.com with SMTP id r2so476457wrs.8 for ; Thu, 23 Jul 2020 08:26:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R3Az9OepR2BdTDAPEdWN7LwMsA5P61TmIGuTZB4zgG8=; b=dQ0bNcNHpnx9qpWEBFvn7k8BSJ2+ODBoKIGwRh8WJxScokmdsmED6rZDIst+EPX73+ IDDU64ZC9K0ihBDdbvtkjDopIVWL++lUhyeRvE1y1WGtDBZY71hjXDm84zKIj44QDyS/ QixwlMZJ4P0+GvPv9cGPqCLIpGUob9YCuBrBuyZk2xKm8jYOQNElQCkudTwJyeftVOgj BcybaEjwi9sQTAZvYtaepJP8A4953wsmbvhodkgh3DC0UE7JAwH2//Gr97lxGDF5F1iC g9Sq+FbIp/Hya2TDm9DioJ5j5tu20mfUOJJQ2xr7x5BtGOyT0g1MpcJbIkuWuX4raguH oOnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R3Az9OepR2BdTDAPEdWN7LwMsA5P61TmIGuTZB4zgG8=; b=WklDr6V2fitUtqRobNLkNeMu/KfIRCE6F4EC/oyXlBAUOYFq3GE80XjdLQf+ivrv/S 2sGRkn8h2GiB+wlT1EdsPjI1Rm56BtttttXTa+ex2JGWdyqurY3PGqKXAlt7viLhkM2A v9ybeGlflgsNZfLldaomXdhcPFCQTk1TFV5qvqRsNSfl8kS+2NhLP4Yp/U1oa1VC1ayg lOyy+q+80bszWW5rTjGbjtMbrCvLK1GpJRdECcnbBrmWbY3mU2NtnOHQItowwPKFhFpK cebyBivfkZkvbD59c1WLnUrQWnemrlicsiCfzQfx6UkrFa63mwwFOx+b206dDQc9zV9X vV7A== X-Gm-Message-State: AOAM532ACLFDBpGsqiTmniQnLqB9E67/HWmXDnjpq6a6Mfrdz4yTa8yW 2GwhPiHIq3f2gk9qDodTRZHwSg== X-Received: by 2002:adf:c108:: with SMTP id r8mr3999574wre.41.1595518017097; Thu, 23 Jul 2020 08:26:57 -0700 (PDT) Received: from mai.imgcgcw.net ([2a01:e34:ed2f:f020:dca7:8d30:33fa:daac]) by smtp.gmail.com with ESMTPSA id g145sm5963491wmg.23.2020.07.23.08.26.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Jul 2020 08:26:56 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: Alexandre Belloni , Nicolas Ferre , Ludovic Desroches , Rob Herring , linux-arm-kernel@lists.infradead.org (moderated list:ARM/Microchip (AT91) SoC support), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 03/16] ARM: dts: at91: sama5d2: add TCB GCLK Date: Thu, 23 Jul 2020 17:26:23 +0200 Message-Id: <20200723152639.639771-3-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200723152639.639771-1-daniel.lezcano@linaro.org> References: <1b1122f4-bce9-f349-e602-ed8e14cbb501@linaro.org> <20200723152639.639771-1-daniel.lezcano@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Alexandre Belloni The sama5d2 tcbs take an extra input clock, their gclk. Signed-off-by: Alexandre Belloni Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20200710230813.1005150-4-alexandre.belloni@bootlin.com --- arch/arm/boot/dts/sama5d2.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 2.25.1 diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index ab550d69db91..996143e966d8 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -499,23 +499,23 @@ macb0: ethernet@f8008000 { }; tcb0: timer@f800c000 { - compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; + compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon"; #address-cells = <1>; #size-cells = <0>; reg = <0xf800c000 0x100>; interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&clk32k>; - clock-names = "t0_clk", "slow_clk"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_GCK 35>, <&clk32k>; + clock-names = "t0_clk", "gclk", "slow_clk"; }; tcb1: timer@f8010000 { - compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; + compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon"; #address-cells = <1>; #size-cells = <0>; reg = <0xf8010000 0x100>; interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&clk32k>; - clock-names = "t0_clk", "slow_clk"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&pmc PMC_TYPE_GCK 36>, <&clk32k>; + clock-names = "t0_clk", "gclk", "slow_clk"; }; hsmc: hsmc@f8014000 {