From patchwork Tue Jun 23 02:50:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 191398 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp1589209ile; Mon, 22 Jun 2020 19:51:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwmAv1zOL8DFO5s7UbUMoF/jm42czinXj9U2FeMx/sDe4T4nVQ6RHWhk/e0hUa7bz7GIWdd X-Received: by 2002:a17:906:4e0a:: with SMTP id z10mr17856018eju.57.1592880696825; Mon, 22 Jun 2020 19:51:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592880696; cv=none; d=google.com; s=arc-20160816; b=anMinbY+hCW/WiU0zjhrXkBrnTL/3/F3ByP7epbSb0EIRwj3dBsCX8fiQ9lzJDrEp3 uizo6LfuAWy5tlfYtltTsx/jEO6+g+/4aaCIV+Zs3ll/an6h4ee7Z4K+n6ykEx9LoGJs +qD5ETIBb89ZNEKW2SbQ7/J15keCHwDR5JAH1sMlt7KBydXqMq8Tq635r/rPasDGUChE qDkbRQMVPaxt5WxOvnVsShfHXjRWh2jxUCGX2lYu9uUCGSoZjlzUNsGOTF+sAWM16u3G +deChTq6881qDMeW9EbS1Co6MUq0JPsQ3ZRMQjRU+DsYbuYNFxD9HMkGq0uCI0MZMfIp HXfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=5WPM/wtqX5R78+w4hNJT615kaa/5c2HUiRdfJ5fBNW4=; b=JMfdetqbgre9jTIaqvXZWws66RdW+6d7wFngxng307+x9JNqDFgwOfH0lxSw7uHqOW I00k6nid+U9DImrILMosk145/6x/x6pkHcuuVfdV5kbcHbReBal2kwH04wa7uucxJ7yY e0oX/AqwiKyqO0aj7wSqK9WS09IqpI5qdi+90wGGXfMoFRDpJDCGv0TYtens9dzzT5GX R4sS71Ja2IKzAzrJitR4AGdqLJJDhP91mrYQWLySVWgbQPjq2Rxw9+AuoMiMA7wny87e nQURqysADFLl5FzqGzqxzvIBApH7rqTl07mSHav2uT1jzwYGSKphHcuDJzIut8LFOr65 YPfw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d6si4469064edx.203.2020.06.22.19.51.36; Mon, 22 Jun 2020 19:51:36 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731892AbgFWCvf (ORCPT + 6 others); Mon, 22 Jun 2020 22:51:35 -0400 Received: from mx2.suse.de ([195.135.220.15]:33024 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731858AbgFWCve (ORCPT ); Mon, 22 Jun 2020 22:51:34 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id C6987AE70; Tue, 23 Jun 2020 02:51:31 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?SmFtZXMgVGFpIFvmiLTlv5fls7Bd?= , =?utf-8?b?U3RhbmxleSBDaGFuZyBb5piM6IKy5b63?= =?utf-8?q?=5D?= , Edgar Lee , =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 05/29] dt-bindings: soc: realtek: rtd1195-chip: Add iso-syscon property Date: Tue, 23 Jun 2020 04:50:42 +0200 Message-Id: <20200623025106.31273-6-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200623025106.31273-1-afaerber@suse.de> References: <20200623025106.31273-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Allow to optionally specify a phandle to iso syscon to identify the chip. RTD1295 family will want to check the ISO_CHIP_INFO1 register. Signed-off-by: Andreas Färber --- A SoC specific binding would defeat the purpose of the generic Linux driver detecting the SoC based on registers. Simply allowing it all for SoC families seems the most flexible. v1 -> v2: * Instead of extending reg, allow optional iso-syscon property for RTD129x. Iso syscon currently does not have a compatible, and it may need to differ across SoC families. .../bindings/soc/realtek/realtek,rtd1195-chip.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.26.2 diff --git a/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml index 86a1de214782..dfe33c95f68d 100644 --- a/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml +++ b/Documentation/devicetree/bindings/soc/realtek/realtek,rtd1195-chip.yaml @@ -11,6 +11,7 @@ maintainers: description: | The Realtek DHC SoCs have some registers to identify the chip and revision. + To identify the exact model within a family, further registers are needed. properties: compatible: @@ -19,6 +20,8 @@ properties: reg: maxItems: 1 + iso-syscon: true + required: - compatible - reg @@ -31,4 +34,10 @@ examples: compatible = "realtek,rtd1195-chip"; reg = <0x1801a200 0x8>; }; + - | + chip-info@9801a200 { + compatible = "realtek,rtd1195-chip"; + reg = <0x9801a200 0x8>; + iso-syscon = <&iso>; + }; ...