From patchwork Tue Jun 23 02:50:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 191412 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp1590111ile; Mon, 22 Jun 2020 19:53:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzE2fT/dWIFwMME4BlLbDXM3d9VzhYSiVGYqrCyEtQYiser7uBqBTf7Zs7WVrtm8Y90yq26 X-Received: by 2002:aa7:dc50:: with SMTP id g16mr20556640edu.318.1592880816294; Mon, 22 Jun 2020 19:53:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592880816; cv=none; d=google.com; s=arc-20160816; b=Lzu28+ovI/+OylOcTdK5BwNyJlHrwqoclTdHjfnCHB5CGm0Ey1ZbSJPTN7D0qaN3NK 0rn1zrZx1stkr9EDjGVdKFApnLt6H2hI+JIzsjMsTYmC4GNKlaura+qvPXj6IQYpmN9D n6DYHVGqFgpHjV6aTJbLfio6YlHLVgi6VUVIMOM025dJFweXcwKYrtEvPIcZKWbw2UbE titVBl2itXK4K/XkTntG5dwVUrQAfH0MXuT1mQeTqijE209V/OiEnIBnlGwWT+NAyHUG pDELLPJqU7YNxvQSd/OKCLIF3+u6It+69zgDTJ4w+LvFm/5S4Xhos8YGgpT9PJ8/1cYP 7ysQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=jjrl/5YC/hs2GCmFNMVgeIn4srT3qvARfCo+YG7ohZg=; b=d3qeSUtQq9+T0hOYmiFLQQjqHdG9JXoutWwC7Om6W5HxaFrItCoIE4rXFI4eFuM318 dcIhX4LyJmnbaYwgY4uA2U0mZHOcTawODcX/Zx62eMb4iEHCr3h85T93VvCJE+k5VQSq LL9CtwbbjQJ3dSyB5TkCwf6aqDhPdUWs1EQCrSBdvDNsueYvXqxXR1Ihnqj+kSNrLTXu 43cyFVQNQ5bAICjWV8wufJahmtbXjdJpFRKYG6aH+0E/jjy0Pzri/3uNbc2Wbx4SKBya 5kHKRu7/icApW1QJbXzf/QlHFo/6WoJYyCAHca1dApuS5sm4AvSmJCSczkNQvGuL35gH TZ+A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l22si490302edv.546.2020.06.22.19.53.36; Mon, 22 Jun 2020 19:53:36 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731879AbgFWCve (ORCPT + 6 others); Mon, 22 Jun 2020 22:51:34 -0400 Received: from mx2.suse.de ([195.135.220.15]:32996 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731847AbgFWCvd (ORCPT ); Mon, 22 Jun 2020 22:51:33 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 52C0DAE7A; Tue, 23 Jun 2020 02:51:31 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?SmFtZXMgVGFpIFvmiLTlv5fls7Bd?= , =?utf-8?b?U3RhbmxleSBDaGFuZyBb5piM6IKy5b63?= =?utf-8?q?=5D?= , Edgar Lee , =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v2 04/29] ARM: dts: rtd1195: Add chip info node Date: Tue, 23 Jun 2020 04:50:41 +0200 Message-Id: <20200623025106.31273-5-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200623025106.31273-1-afaerber@suse.de> References: <20200623025106.31273-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a DT node for chip identification. Signed-off-by: Andreas Färber --- v1 -> v2: * Rebased onto SB2 syscon arch/arm/boot/dts/rtd1195.dtsi | 5 +++++ 1 file changed, 5 insertions(+) -- 2.26.2 Reviewed-by: Stanley Chang diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi index 6fd12a2d766e..5ad0e81c37af 100644 --- a/arch/arm/boot/dts/rtd1195.dtsi +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -223,6 +223,11 @@ sb2_hd_sem: hwspinlock@0 { #hwlock-cells = <0>; }; + chip-info@200 { + compatible = "realtek,rtd1195-chip"; + reg = <0x200 0x8>; + }; + sb2_hd_sem_new: hwspinlock@620 { compatible = "realtek,rtd1195-sb2-sem"; reg = <0x620 0x20>;