From patchwork Fri Jun 19 14:32:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 198785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2025C433E1 for ; Fri, 19 Jun 2020 16:53:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7DF9620734 for ; Fri, 19 Jun 2020 16:53:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592585613; bh=tusqSggmbCjVTGyD6rz3L0jioKmDgZahfSG5qdhwepY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=BkdRbNIhNqT5DFLsDuBPpk9KLVARN4+xITuldNMht0arIVNGE8fW6FEU37zC70o7C lz11Z20N4K2y4rXIY2GAQzsfxAWlP97Lqw+HM0ymC2Lu4SmzFUnNeDc/JpiLTR/UGk WxKklX6UIJsstKVs9XloCq+iKIx4YtQL2+wH2Uoc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387692AbgFSOhT (ORCPT ); Fri, 19 Jun 2020 10:37:19 -0400 Received: from mail.kernel.org ([198.145.29.99]:54000 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387650AbgFSOhN (ORCPT ); Fri, 19 Jun 2020 10:37:13 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 22F7E20DD4; Fri, 19 Jun 2020 14:37:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592577432; bh=tusqSggmbCjVTGyD6rz3L0jioKmDgZahfSG5qdhwepY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E/G4AjbFkHj9LzAwd0iDM+drmMtZFlLuOQF/fq9QvSaV+WbUuaMt4mE2n6FuTWQSf 1ifstb1Vhofi/AdXzbPijI+Q6NEHtrtuHgdNQbNW+Bk+hPzJ3OezKlfedY6UuDVmfk a4LVWF/9Y0r2T3Oy0u1LRIXzPUtgknj6/ZxRiBHg= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Georgy Vlasov , Serge Semin , Ramil Zaripov , Alexey Malahov , Thomas Bogendoerfer , Paul Burton , Ralf Baechle , Arnd Bergmann , Andy Shevchenko , Rob Herring , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, Mark Brown , Sasha Levin Subject: [PATCH 4.4 049/101] spi: dw: Enable interrupts in accordance with DMA xfer mode Date: Fri, 19 Jun 2020 16:32:38 +0200 Message-Id: <20200619141616.642921141@linuxfoundation.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200619141614.001544111@linuxfoundation.org> References: <20200619141614.001544111@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Serge Semin [ Upstream commit 43dba9f3f98c2b184a19f856f06fe22817bfd9e0 ] It's pointless to track the Tx overrun interrupts if Rx-only SPI transfer is issued. Similarly there is no need in handling the Rx overrun/underrun interrupts if Tx-only SPI transfer is executed. So lets unmask the interrupts only if corresponding SPI transactions are implied. Co-developed-by: Georgy Vlasov Signed-off-by: Georgy Vlasov Signed-off-by: Serge Semin Cc: Ramil Zaripov Cc: Alexey Malahov Cc: Thomas Bogendoerfer Cc: Paul Burton Cc: Ralf Baechle Cc: Arnd Bergmann Cc: Andy Shevchenko Cc: Rob Herring Cc: linux-mips@vger.kernel.org Cc: devicetree@vger.kernel.org Link: https://lore.kernel.org/r/20200522000806.7381-3-Sergey.Semin@baikalelectronics.ru Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- drivers/spi/spi-dw-mid.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c index 4d6434b244e2..bd116f117b02 100644 --- a/drivers/spi/spi-dw-mid.c +++ b/drivers/spi/spi-dw-mid.c @@ -228,19 +228,23 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws, static int mid_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer) { - u16 dma_ctrl = 0; + u16 imr = 0, dma_ctrl = 0; dw_writel(dws, DW_SPI_DMARDLR, 0xf); dw_writel(dws, DW_SPI_DMATDLR, 0x10); - if (xfer->tx_buf) + if (xfer->tx_buf) { dma_ctrl |= SPI_DMA_TDMAE; - if (xfer->rx_buf) + imr |= SPI_INT_TXOI; + } + if (xfer->rx_buf) { dma_ctrl |= SPI_DMA_RDMAE; + imr |= SPI_INT_RXUI | SPI_INT_RXOI; + } dw_writel(dws, DW_SPI_DMACR, dma_ctrl); /* Set the interrupt mask */ - spi_umask_intr(dws, SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI); + spi_umask_intr(dws, imr); dws->transfer_handler = dma_transfer;