From patchwork Tue Jun 9 08:07:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lars Povlsen X-Patchwork-Id: 199373 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF6F7C433E0 for ; Tue, 9 Jun 2020 08:07:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C93D720812 for ; Tue, 9 Jun 2020 08:07:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="BMReck5d" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728012AbgFIIHx (ORCPT ); Tue, 9 Jun 2020 04:07:53 -0400 Received: from esa5.microchip.iphmx.com ([216.71.150.166]:19560 "EHLO esa5.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726404AbgFIIHw (ORCPT ); Tue, 9 Jun 2020 04:07:52 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1591690072; x=1623226072; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hDfQm25RaAmujsIowdG8uTcBtEG+yGbxTplI847Sros=; b=BMReck5dzD1SsGJel0Zv4VaTvn3SBmMkHJLdlEmT5Azt0iT5xvFP5qgW 3/GZ5IRA2ihLknMp3aXLEiC2Rxy0Q60N2eplJB8l4LNzq4RLNMABkuEGD +Rttj+mjP78VezXSyN4Qj2IXX3/c6NAAp4M0Wi5zUaa2oJUXzRuPRMIsa WJm1I9iTaEcqJr6Pm8n2tXVIESxeaipejy6blXXw5mQ/KAGvjU9xgBROu zkHTrPswNvE+vNSa1EihsW4yuhVLSXtKQqPlg/+Y5c8HksHreH5ooN3kt qxeOlDNVHW6BAuT6x6Jgy0wdKn5WeKAPQ3wJnWLMm/8H/fAqz/ygYBhhw g==; IronPort-SDR: f8ilDVGyprtH+DaeaV1T37Ijp4w/8wSSs1Rd8FdRBFmlR2zwZ3FuLY9ows4S8JkaJBJpArAvBt d5vpynnG8py4eLs1WYZ24MbvRhOnro4Sf1PjzAiEhha+3FZmpGnlzDGHl9SWL693qOGznpbXxk j7O4b8Q7CAzuYDM8sPBRZgr3yA+bWshQSRHXmTjhbuV6mStd9vS90r6ndwKGUuBaoNy9S4ymJF VswEvNzoyk6TjCu95d7q0Wg7ix7IoEZRSMs/9F/K9azz1XJNrL6Lo1WlMeXtqXlt52jRNpvnUL M5A= X-IronPort-AV: E=Sophos;i="5.73,491,1583218800"; d="scan'208";a="78702707" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Jun 2020 01:07:52 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1847.3; Tue, 9 Jun 2020 01:07:51 -0700 Received: from soft-dev15.microsemi.net (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.1847.3 via Frontend Transport; Tue, 9 Jun 2020 01:07:48 -0700 From: Lars Povlsen To: Arnd Bergmann , Stephen Boyd , "Linus Walleij" CC: Lars Povlsen , Steen Hegelund , Microchip Linux Driver Support , Olof Johansson , "Michael Turquette" , , , , , , Alexandre Belloni Subject: [PATCH v2 02/10] arm64: sparx5: Add support for Microchip 2xA53 SoC Date: Tue, 9 Jun 2020 10:07:01 +0200 Message-ID: <20200609080709.9654-2-lars.povlsen@microchip.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200609080709.9654-1-lars.povlsen@microchip.com> References: <20200608123024.5330-1-lars.povlsen@microchip.com> <20200609080709.9654-1-lars.povlsen@microchip.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds support for the Microchip Sparx5 ARMv8-based SoC family of TSN-capable gigabit switches. Reviewed-by: Alexandre Belloni Signed-off-by: Lars Povlsen --- MAINTAINERS | 8 ++++++++ arch/arm64/Kconfig.platforms | 14 ++++++++++++++ 2 files changed, 22 insertions(+) -- 2.27.0 diff --git a/MAINTAINERS b/MAINTAINERS index 411cd97bb4858..3fe6f314df3e7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2111,6 +2111,14 @@ X: drivers/net/wireless/atmel/ N: at91 N: atmel +ARM/Microchip Sparx5 SoC support +M: Lars Povlsen +M: Steen Hegelund +M: Microchip Linux Driver Support +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +N: sparx5 +S: Supported + ARM/MIOA701 MACHINE SUPPORT M: Robert Jarzmik L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 8dd05b2a925c5..8939e4e6e34c2 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -89,6 +89,20 @@ config ARCH_EXYNOS help This enables support for ARMv8 based Samsung Exynos SoC family. +config ARCH_SPARX5 + bool "ARMv8 based Microchip Sparx5 SoC family" + select PINCTRL + select DW_APB_TIMER_OF + help + This enables support for the Microchip Sparx5 ARMv8-based + SoC family of TSN-capable gigabit switches. + + The SparX-5 Ethernet switch family provides a rich set of + switching features such as advanced TCAM-based VLAN and QoS + processing enabling delivery of differentiated services, and + security through TCAM-based frame processing using versatile + content aware processor (VCAP). + config ARCH_K3 bool "Texas Instruments Inc. K3 multicore SoC architecture" select PM_GENERIC_DOMAINS if PM