From patchwork Thu Jun 4 09:05:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xia Jiang X-Patchwork-Id: 199556 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A932C433E0 for ; Thu, 4 Jun 2020 09:08:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 69B802074B for ; Thu, 4 Jun 2020 09:08:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="p7/+XN+x" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726923AbgFDJI3 (ORCPT ); Thu, 4 Jun 2020 05:08:29 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:15408 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728336AbgFDJI1 (ORCPT ); Thu, 4 Jun 2020 05:08:27 -0400 X-UUID: 4440c8ef08b340a8b7cabd92f4721d94-20200604 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=vkxEcxVbz+KaSwcUkdHQ5ny9Os/VdTrQm9pCD9BhSDg=; b=p7/+XN+xMw+Hfie8oXbM2IpSrwEQi7kuvd9c8+z2c9Xu/XLD3pth/6vwJq71ljzy1+ISjPpGK8f1Qw0uwoANJg56kUJbt/fAC02QINHO9rvZIOr3LSpQtQLWvgQtVeFyvrDBj0VeO/RvltDJYpBJEO8s68GSrHUyv9GySkj4b98=; X-UUID: 4440c8ef08b340a8b7cabd92f4721d94-20200604 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 698401104; Thu, 04 Jun 2020 17:08:24 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs05n1.mediatek.inc (172.21.101.15) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 4 Jun 2020 17:08:22 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 4 Jun 2020 17:08:20 +0800 From: Xia Jiang To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Rick Chang CC: , , , , , Marek Szyprowski , Tomasz Figa , , , , , , , Xia Jiang Subject: [PATCH RESEND v9 15/18] arm: dts: mt2701: Add jpeg enc device tree node Date: Thu, 4 Jun 2020 17:05:50 +0800 Message-ID: <20200604090553.10861-17-xia.jiang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200604090553.10861-1-xia.jiang@mediatek.com> References: <20200604090553.10861-1-xia.jiang@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add jpeg enc device tree node. Signed-off-by: Xia Jiang --- v9: add "mt2701" in the title description --- arch/arm/boot/dts/mt2701.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.18.0 diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 2c4ec82547ee..235bacc0e418 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -568,6 +568,19 @@ <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; }; + jpegenc: jpegenc@1500a000 { + compatible = "mediatek,mt2701-jpgenc", + "mediatek,mtk-jpgenc"; + reg = <0 0x1500a000 0 0x1000>; + interrupts = ; + clocks = <&imgsys CLK_IMG_VENC>; + clock-names = "jpgenc"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; + mediatek,larb = <&larb2>; + iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>, + <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>; + }; + vdecsys: syscon@16000000 { compatible = "mediatek,mt2701-vdecsys", "syscon"; reg = <0 0x16000000 0 0x1000>;