From patchwork Thu May 28 07:40:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 199871 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BCFBC433DF for ; Thu, 28 May 2020 07:40:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 42BC7208E4 for ; Thu, 28 May 2020 07:40:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="K3zZ78Vj" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725882AbgE1Hkr (ORCPT ); Thu, 28 May 2020 03:40:47 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:2402 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726612AbgE1Hkr (ORCPT ); Thu, 28 May 2020 03:40:47 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 04S7cGL4021525; Thu, 28 May 2020 09:40:34 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=9s8rRWY2/DMpcHEPwTMeGJLjGxdEGlTAbHILe6veab8=; b=K3zZ78VjlK1uYimIhsLP57LpzxfLF9VRNjDQH5yiShuL7S/9TMNu3OBpd84tEs0Mo7fS 3UGT7rRe63mp3cvtK7+u+o0/Ko2v66Adv2F4nrhucTy9VIeAl8cTM5VdQ8EiYRDym4LP ZMl12p5WWleL4mytVRaExRqNSZIRU7ktUOKAncTxLLc+KDsHLrC7w3UOrsOGv6W4o1Yn w2xfuniyGlRJaM+ZGYSDwJCJ85HkxYuYon0lMR1OQhxvKY5K0lGWqJGgzar3z0ezrKWk FB8hAVY9ZDrkwhWynlXtL4zvg/HR25xpi3bR0nKuX6EBW0YYRnN2AeVXPVUUfZ7+7Mqb 1Q== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 319mfanmk9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 May 2020 09:40:34 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0486E100038; Thu, 28 May 2020 09:40:34 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node1.st.com [10.75.127.7]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id EBC302B188D; Thu, 28 May 2020 09:40:33 +0200 (CEST) Received: from localhost (10.75.127.47) by SFHDAG3NODE1.st.com (10.75.127.7) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 28 May 2020 09:40:33 +0200 From: Erwan Le Ray To: Maxime Coquelin , Alexandre Torgue , Rob Herring , Mark Rutland CC: , , , , Erwan Le Ray , Fabrice Gasnier Subject: [PATCH 1/5] ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl Date: Thu, 28 May 2020 09:40:25 +0200 Message-ID: <20200528074029.24962-2-erwan.leray@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200528074029.24962-1-erwan.leray@st.com> References: <20200528074029.24962-1-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG5NODE3.st.com (10.75.127.15) To SFHDAG3NODE1.st.com (10.75.127.7) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-05-28_02:2020-05-28,2020-05-27 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Adds usart2_pins_c, usart3_pins_b, usart3_pins_c and uart7_pins_c pins configurations in stm32mp15-pinctrl. - usart2_pins_c pins are connected to Bluetooth chip on dk2 board. - usart3_pins_b pins are connected to GPIO expansion connector on evx board. - usart3_pins_c pins are connected to GPIO expansion connector on dkx board. - uart7_pins_c pins are connected to Arduino Uno connector on dkx board. Signed-off-by: Erwan Le Ray diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index fb98a66977fe..99e399e4e4c3 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1658,6 +1658,36 @@ }; }; + uart7_pins_c: uart7-1 { + pins1 { + pinmux = ; /* USART7_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* USART7_RX */ + bias-disable; + }; + }; + + uart7_idle_pins_c: uart7-idle-1 { + pins1 { + pinmux = ; /* USART7_TX */ + }; + pins2 { + pinmux = ; /* USART7_RX */ + bias-disable; + }; + }; + + uart7_sleep_pins_c: uart7-sleep-1 { + pins { + pinmux = , /* USART7_TX */ + ; /* USART7_RX */ + }; + }; + uart8_pins_a: uart8-0 { pins1 { pinmux = ; /* UART8_TX */ @@ -1719,6 +1749,42 @@ }; }; + usart2_pins_c: usart2-0 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <3>; + }; + pins2 { + pinmux = , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + usart2_idle_pins_c: usart2-idle-0 { + pins1 { + pinmux = , /* USART2_TX */ + , /* USART2_RTS */ + ; /* USART2_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART2_RX */ + bias-disable; + }; + }; + + usart2_sleep_pins_c: usart2-sleep-0 { + pins { + pinmux = , /* USART2_TX */ + , /* USART2_RTS */ + , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + }; + }; + usart3_pins_a: usart3-0 { pins1 { pinmux = ; /* USART3_TX */ @@ -1732,6 +1798,78 @@ }; }; + usart3_pins_b: usart3-0 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART3_RX */ + ; /* USART3_CTS_NSS */ + bias-disable; + }; + }; + + usart3_idle_pins_b: usart3-idle-0 { + pins1 { + pinmux = , /* USART3_TX */ + , /* USART3_RTS */ + ; /* USART3_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART3_RX */ + bias-disable; + }; + }; + + usart3_sleep_pins_b: usart3-sleep-0 { + pins { + pinmux = , /* USART3_TX */ + , /* USART3_RTS */ + , /* USART3_CTS_NSS */ + ; /* USART3_RX */ + }; + }; + + usart3_pins_c: usart3-1 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART3_RX */ + ; /* USART3_CTS_NSS */ + bias-disable; + }; + }; + + usart3_idle_pins_c: usart3-idle-1 { + pins1 { + pinmux = , /* USART3_TX */ + , /* USART3_RTS */ + ; /* USART3_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART3_RX */ + bias-disable; + }; + }; + + usart3_sleep_pins_c: usart3-sleep-1 { + pins { + pinmux = , /* USART3_TX */ + , /* USART3_RTS */ + , /* USART3_CTS_NSS */ + ; /* USART3_RX */ + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = ; /* OTG_ID */