From patchwork Thu May 28 07:40:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 199873 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB73BC433DF for ; Thu, 28 May 2020 07:40:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9BDB120B80 for ; Thu, 28 May 2020 07:40:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="dUxTXPl+" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725971AbgE1Hkf (ORCPT ); Thu, 28 May 2020 03:40:35 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:37244 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727035AbgE1Hke (ORCPT ); Thu, 28 May 2020 03:40:34 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 04S7bYHs027404; Thu, 28 May 2020 09:40:10 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=V658O7acapdBO2YkB9RbwR06ZSaEppsTrdRBJUuLL0w=; b=dUxTXPl+MM1S9zwJ/QVm/iwWXUwMj4UHVYkWvAcsKii7gUWLIfEsp72LBkRwJbkI2XwF IHJOY9qq+kVaBzrKSVkMXncNli5K1OEvJjQsvo821dQxmeD/nRiJPgibIoMyWQBg1QDY OGqdrEG9A/eq15BoUF8mQaExXUwnQD/W3geNKTpYYhlxe5NLlsd0lqWp+HcBpj/YPUJR PnPbS04YdDJgSj86Y6CYRM5tKNdYbQsh+kS8j/h9NLBVXmhNO89GFw0xi4jM0T+j25i1 HIq5kqXahef/ERXiwPNm0Pn2UFY1f54xsSXhxFDsDMn3yZQn2sqRU43OHZ81UpVTGN2B 7w== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 316tqh9na5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 May 2020 09:40:10 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B3683100040; Thu, 28 May 2020 09:40:09 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node1.st.com [10.75.127.7]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A189A2B1882; Thu, 28 May 2020 09:40:09 +0200 (CEST) Received: from localhost (10.75.127.47) by SFHDAG3NODE1.st.com (10.75.127.7) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 28 May 2020 09:40:09 +0200 From: Erwan Le Ray To: Maxime Coquelin , Alexandre Torgue , Rob Herring , Mark Rutland CC: , , , , Erwan Le Ray , Fabrice Gasnier Subject: [PATCH 2/2] ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl Date: Thu, 28 May 2020 09:40:03 +0200 Message-ID: <20200528074003.24875-3-erwan.leray@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200528074003.24875-1-erwan.leray@st.com> References: <20200528074003.24875-1-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG6NODE2.st.com (10.75.127.17) To SFHDAG3NODE1.st.com (10.75.127.7) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-05-28_02:2020-05-28,2020-05-27 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Fix uart7_pins_a comments to indicate UART7 pins instead of UART4 pins. Fixes: bf4b5f379fed ("ARM: dts: stm32: Add missing pinctrl definitions for STM32MP157") Signed-off-by: Erwan Le Ray diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 5ff1323236e1..fb98a66977fe 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1632,15 +1632,15 @@ uart7_pins_a: uart7-0 { pins1 { - pinmux = ; /* UART4_TX */ + pinmux = ; /* UART7_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = , /* UART4_RX */ - , /* UART4_CTS */ - ; /* UART4_RTS */ + pinmux = , /* UART7_RX */ + , /* UART7_CTS */ + ; /* UART7_RTS */ bias-disable; }; };