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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id o6sm4397252wrw.63.2020.05.05.10.02.35 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 May 2020 10:02:36 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] arm64: dts: rockchip: fix phy nodename for rk3328 Date: Tue, 5 May 2020 19:02:27 +0200 Message-Id: <20200505170227.6503-1-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20200321215423.12176-1-jbx6244@gmail.com> References: <20200321215423.12176-1-jbx6244@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org A test with the command below gives for example this error: arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: phy@0: '#phy-cells' is a required property The phy nodename is normally used by a phy-handle. This node is however compatible with "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22" which is just been added to 'ethernet-phy.yaml'. So change nodename to 'ethernet-phy' for which '#phy-cells' is not a required property make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ phy/phy-provider.yaml Signed-off-by: Johan Jonker --- Changes v2: Reword commit message in the same way as in the patches for 'rk3228-evb.dts' and 'rk3229-xms6.dts' that are already aproved. Patch 2-6 of version 1 unchanged. --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 931a9279e..fdf0e1b26 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -935,7 +935,7 @@ #address-cells = <1>; #size-cells = <0>; - phy: phy@0 { + phy: ethernet-phy@0 { compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22"; reg = <0>; clocks = <&cru SCLK_MAC2PHY_OUT>;