From patchwork Mon Mar 30 01:08:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 202670 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AC69C43331 for ; Mon, 30 Mar 2020 01:09:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6EA7D20748 for ; Mon, 30 Mar 2020 01:09:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="F7nQYiIa" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728494AbgC3BJ4 (ORCPT ); Sun, 29 Mar 2020 21:09:56 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:45491 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728414AbgC3BJy (ORCPT ); Sun, 29 Mar 2020 21:09:54 -0400 Received: by mail-lj1-f195.google.com with SMTP id t17so16314658ljc.12; Sun, 29 Mar 2020 18:09:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UVJ9yyE9K29bjnDrPjNdExCXsCR6dQskyYaw3z4hZMU=; b=F7nQYiIaHaST/H7lR7YpTTa4yZjR1j5Co4uSUtl0sgMnIvNo+M+8NFbhKOUavfmm/K L8+5mcmop875YhcV806hvT5NeLKYsURWzYro4YNtmtxxThG3DBQSRBJ//NBhVa/Okk96 blIweno/JmI2vIHcs2M+M4ocr7ITywTV95X+8QFqxcqUksEe66nTgUuojF5u3kqHxspg 1NjfQIp6xQcVYJng1r5m8wGrvQ5T6aaEVHyUeWn/zN01OXK9w0VoPkj6PF9Aa6GCc3Ip jy5pmksmf3z4WB4zU7CpLFG/vX4jxXtz8+Luys44rcz0vmCYu5W2IWhL6O6ANdqxBHPh KN4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UVJ9yyE9K29bjnDrPjNdExCXsCR6dQskyYaw3z4hZMU=; b=jh8QoreotbNhDq380wY0xiDEH3/1qJ5o5q+mo85zlYEOl47QUe6CfzcaIuB49YntDW v7vuczRCikjU4imnlCAErGdc4RuqNYUQElc8YYueUkUUv+FlFmKrXQYQJeTrZkIYoJS+ R5Z1gJZB1ddPNu28bzFfIU+woGTpix130LG/sZFU31Sh2fY8yzrLBJscw01hLlG0HUTY e9w0lUvVU1j4AfzJoAZuQ4VnjO4Bx1351pw7k+Od+vXbMv/Ibwka3+1xJbJYYdEc0UfZ J14rnEVNHVjgROrFQTs2aCvuWVL+qSkxl9RrVwoVYuS20IL8/UF5Mx4p+n/yustbV99P 3Taw== X-Gm-Message-State: AGi0PuYCLpk6i7m8pSxy64fx2q7n3Z8yA9ogINfeniyY2cgkNB50H0i1 XZnWFMLTLPK8jYdz00TISL8= X-Google-Smtp-Source: APiQypIW79Ltthny3GKQ7ecV2+YYx75UJ9/u2MNZafMabV+CzVs4wTMFMrkD4t5ow3wMmWRR3u68tQ== X-Received: by 2002:a2e:88cb:: with SMTP id a11mr5830944ljk.245.1585530592036; Sun, 29 Mar 2020 18:09:52 -0700 (PDT) Received: from localhost.localdomain (ppp91-78-208-152.pppoe.mtu-net.ru. [91.78.208.152]) by smtp.gmail.com with ESMTPSA id f23sm2449005lja.60.2020.03.29.18.09.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Mar 2020 18:09:51 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , =?utf-8?b?QXJ0dXIgxZp3aWdvxYQ=?= , Georgi Djakov , Rob Herring Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v2 17/22] memory: tegra30-emc: Register as interconnect provider Date: Mon, 30 Mar 2020 04:08:59 +0300 Message-Id: <20200330010904.27643-18-digetx@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200330010904.27643-1-digetx@gmail.com> References: <20200330010904.27643-1-digetx@gmail.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now external memory controller is a memory interconnection provider. This allows us to use interconnect API to change memory configuration. Signed-off-by: Dmitry Osipenko --- drivers/memory/tegra/tegra30-emc.c | 115 +++++++++++++++++++++++++++++ 1 file changed, 115 insertions(+) diff --git a/drivers/memory/tegra/tegra30-emc.c b/drivers/memory/tegra/tegra30-emc.c index 69698665d431..5a4106173a75 100644 --- a/drivers/memory/tegra/tegra30-emc.c +++ b/drivers/memory/tegra/tegra30-emc.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -327,6 +328,7 @@ struct tegra_emc { struct device *dev; struct tegra_mc *mc; struct notifier_block clk_nb; + struct icc_provider provider; struct clk *clk; void __iomem *regs; unsigned int irq; @@ -1264,6 +1266,112 @@ static void tegra_emc_debugfs_init(struct tegra_emc *emc) emc, &tegra_emc_debug_max_rate_fops); } +static inline struct tegra_emc * +to_tegra_emc_provider(struct icc_provider *provider) +{ + return container_of(provider, struct tegra_emc, provider); +} + +static struct icc_node * +emc_of_icc_xlate_onecell(struct of_phandle_args *spec, void *data) +{ + struct icc_provider *provider = data; + struct icc_node *node; + + /* External Memory is the only possible ICC route */ + list_for_each_entry(node, &provider->nodes, node_list) { + if (node->id == TEGRA_ICC_EMEM) + return node; + } + + return ERR_PTR(-EINVAL); +} + +static int emc_icc_set(struct icc_node *src, struct icc_node *dst) +{ + struct tegra_emc *emc = to_tegra_emc_provider(dst->provider); + unsigned long long rate = icc_units_to_bps(dst->avg_bw); + unsigned int dram_data_bus_width_bytes = 4; + unsigned int ddr = 2; + int err; + + do_div(rate, ddr * dram_data_bus_width_bytes); + rate = min_t(u64, rate, U32_MAX); + + err = clk_set_min_rate(emc->clk, rate); + if (err) + return err; + + err = clk_set_rate(emc->clk, rate); + if (err) + return err; + + return 0; +} + +static int emc_icc_aggregate(struct icc_node *node, + u32 tag, u32 avg_bw, u32 peak_bw, + u32 *agg_avg, u32 *agg_peak) +{ + *agg_avg = min((u64)avg_bw + (*agg_avg), (u64)U32_MAX); + *agg_peak = max(*agg_peak, peak_bw); + + return 0; +} + +static int tegra_emc_interconnect_init(struct tegra_emc *emc) +{ + struct icc_node *node; + int err; + + /* older device-trees don't have interconnect properties */ + if (!of_find_property(emc->dev->of_node, "#interconnect-cells", NULL)) + return 0; + + emc->provider.dev = emc->dev; + emc->provider.set = emc_icc_set; + emc->provider.data = &emc->provider; + emc->provider.xlate = emc_of_icc_xlate_onecell; + emc->provider.aggregate = emc_icc_aggregate; + + err = icc_provider_add(&emc->provider); + if (err) + return err; + + /* create External Memory Controller node */ + node = icc_node_create(TEGRA_ICC_EMC); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto del_provider; + + node->name = "External Memory Controller"; + icc_node_add(node, &emc->provider); + + /* link External Memory Controller to External Memory (DRAM) */ + err = icc_link_create(node, TEGRA_ICC_EMEM); + if (err) + goto remove_nodes; + + /* create External Memory node */ + node = icc_node_create(TEGRA_ICC_EMEM); + err = PTR_ERR_OR_ZERO(node); + if (err) + goto remove_nodes; + + node->name = "External Memory (DRAM)"; + icc_node_add(node, &emc->provider); + + return 0; + +remove_nodes: + icc_nodes_remove(&emc->provider); + +del_provider: + icc_provider_del(&emc->provider); + + return err; +} + static int tegra_emc_probe(struct platform_device *pdev) { struct platform_device *mc; @@ -1344,6 +1452,13 @@ static int tegra_emc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, emc); tegra_emc_debugfs_init(emc); + if (IS_ENABLED(CONFIG_INTERCONNECT)) { + err = tegra_emc_interconnect_init(emc); + if (err) + dev_err(&pdev->dev, "failed to initialize ICC: %d\n", + err); + } + return 0; unset_cb: