@@ -122,6 +122,8 @@ DEFINE_ALE_FIELD(mcast, 40, 1)
DEFINE_ALE_FIELD(vlan_unreg_mcast_idx, 20, 3)
DEFINE_ALE_FIELD(vlan_reg_mcast_idx, 44, 3)
+#define NU_VLAN_UNREG_MCAST_IDX 1
+
/* The MAC address field in the ALE entry cannot be macroized as above */
static inline void cpsw_ale_get_addr(u32 *ale_entry, u8 *addr)
{
@@ -455,6 +457,8 @@ int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port_mask, int untag,
cpsw_ale_set_vlan_unreg_mcast(ale_entry, unreg_mcast,
ale->vlan_field_bits);
} else {
+ cpsw_ale_set_vlan_unreg_mcast_idx(ale_entry,
+ NU_VLAN_UNREG_MCAST_IDX);
cpsw_ale_set_vlan_mcast(ale, ale_entry, reg_mcast, unreg_mcast);
}
cpsw_ale_set_vlan_member_list(ale_entry, port_mask,
On AM65xx MCU CPSW2G NUSS and 66AK2E/L NUSS the unregistered multicast packets are still can be received with promisc and allmulti disabled. This happens, because ALE VLAN entries on these SoCs do not contain port masks for reg/unreg mcast packets, but instead store indexes of ALE_VLAN_MASK_MUXx_REG registers which intended for store port masks for reg/unreg mcast packets. ALE VLAN entry:UNREG_MCAST_FLOOD_INDEX -> ALE_VLAN_MASK_MUXx ALE VLAN entry:REG_MCAST_FLOOD_INDEX -> ALE_VLAN_MASK_MUXy The commit b361da837392 ("net: netcp: ale: add proper ale entry mask bits for netcp switch ALE") update ALE code to support such ALE entries, it is always used ALE_VLAN_MASK_MUX0_REG index in ALE VLAN entry for unreg mcast packets mask configuration, which is read-only, at least for AM65xx MCU CPSW2G NUSS and 66AK2E/L NUSS. As result unreg mcast packets are allowed always. Hence, update ALE code to use ALE_VLAN_MASK_MUX1_REG index for ALE VLAN entries to configure unreg mcast port mask. Fixes: b361da837392 ("net: netcp: ale: add proper ale entry mask bits for netcp switch ALE") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> --- drivers/net/ethernet/ti/cpsw_ale.c | 4 ++++ 1 file changed, 4 insertions(+)