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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id z19sm17576705wma.41.2020.03.13.06.29.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Mar 2020 06:29:33 -0700 (PDT) From: Johan Jonker To: jic23@kernel.org Cc: knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, heiko@sntech.de, robh+dt@kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/3] dt-bindings: iio: adc: convert rockchip saradc bindings to yaml Date: Fri, 13 Mar 2020 14:29:24 +0100 Message-Id: <20200313132926.10543-1-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Current dts files with 'saradc' nodes are manually verified. In order to automate this process rockchip-saradc.txt has to be converted to yaml. Signed-off-by: Johan Jonker --- .../bindings/iio/adc/rockchip-saradc.txt | 37 ---------- .../bindings/iio/adc/rockchip-saradc.yaml | 79 ++++++++++++++++++++++ 2 files changed, 79 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt create mode 100644 Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt deleted file mode 100644 index c2c50b598..000000000 --- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt +++ /dev/null @@ -1,37 +0,0 @@ -Rockchip Successive Approximation Register (SAR) A/D Converter bindings - -Required properties: -- compatible: should be "rockchip,-saradc" or "rockchip,rk3066-tsadc" - - "rockchip,saradc": for rk3188, rk3288 - - "rockchip,rk3066-tsadc": for rk3036 - - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328 - - "rockchip,rk3399-saradc": for rk3399 - - "rockchip,rv1108-saradc", "rockchip,rk3399-saradc": for rv1108 - -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: The interrupt number to the cpu. The interrupt specifier format - depends on the interrupt controller. -- clocks: Must contain an entry for each entry in clock-names. -- clock-names: Shall be "saradc" for the converter-clock, and "apb_pclk" for - the peripheral clock. -- vref-supply: The regulator supply ADC reference voltage. -- #io-channel-cells: Should be 1, see ../iio-bindings.txt - -Optional properties: -- resets: Must contain an entry for each entry in reset-names if need support - this option. See ../reset/reset.txt for details. -- reset-names: Must include the name "saradc-apb". - -Example: - saradc: saradc@2006c000 { - compatible = "rockchip,saradc"; - reg = <0x2006c000 0x100>; - interrupts = ; - clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; - clock-names = "saradc", "apb_pclk"; - resets = <&cru SRST_SARADC>; - reset-names = "saradc-apb"; - #io-channel-cells = <1>; - vref-supply = <&vcc18>; - }; diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml new file mode 100644 index 000000000..2908788b3 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Successive Approximation Register (SAR) A/D Converter + +maintainers: + - Heiko Stuebner + +properties: + compatible: + oneOf: + - const: rockchip,saradc + - const: rockchip,rk3066-tsadc + - const: rockchip,rk3399-saradc + - items: + - enum: + - rockchip,rk3328-saradc + - rockchip,rv1108-saradc + - const: rockchip,rk3399-saradc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: converter clock + - description: peripheral clock + + clock-names: + items: + - const: saradc + - const: apb_pclk + + resets: + maxItems: 1 + + reset-names: + const: saradc-apb + + vref-supply: + description: + The regulator supply for the ADC reference voltage. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vref-supply + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include + #include + #include + saradc: saradc@2006c000 { + compatible = "rockchip,saradc"; + reg = <0x2006c000 0x100>; + interrupts = ; + clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + resets = <&cru SRST_SARADC>; + reset-names = "saradc-apb"; + vref-supply = <&vcc18>; + #io-channel-cells = <1>; + };