From patchwork Thu Feb 27 11:55:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mans Rullgard X-Patchwork-Id: 204134 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF205C4BA24 for ; Thu, 27 Feb 2020 11:55:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BCD9724695 for ; Thu, 27 Feb 2020 11:55:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728926AbgB0Lza (ORCPT ); Thu, 27 Feb 2020 06:55:30 -0500 Received: from unicorn.mansr.com ([81.2.72.234]:44832 "EHLO unicorn.mansr.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728865AbgB0Lza (ORCPT ); Thu, 27 Feb 2020 06:55:30 -0500 Received: by unicorn.mansr.com (Postfix, from userid 51770) id 48F8815EF6; Thu, 27 Feb 2020 11:55:28 +0000 (GMT) From: Mans Rullgard To: Maxime Ripard , Chen-Yu Tsai Cc: Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] ARM: dts: sunxi: h3/h5: add r_pwm node Date: Thu, 27 Feb 2020 11:55:26 +0000 Message-Id: <20200227115526.28075-1-mans@mansr.com> X-Mailer: git-send-email 2.25.0 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org There is a second PWM unit available in the PL I/O block. Add a node and pinmux definition for it. Signed-off-by: Mans Rullgard --- Changed in v2: - use singular name (pin vs pins) for pinmux group - set pinmux in device node as there is only one choice --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 107eeafad20a..54b32537d6ae 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -871,6 +871,21 @@ pins = "PL0", "PL1"; function = "s_i2c"; }; + + r_pwm_pin: r-pwm-pin { + pins = "PL10"; + function = "s_pwm"; + }; + }; + + r_pwm: pwm@1f03800 { + compatible = "allwinner,sun8i-h3-pwm"; + reg = <0x01f03800 0x8>; + pinctrl-names = "default"; + pinctrl-0 = <&r_pwm_pin>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; }; }; };