From patchwork Wed Jan 8 11:18:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 206004 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55516C33C9E for ; Wed, 8 Jan 2020 11:18:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2B875206F0 for ; Wed, 8 Jan 2020 11:18:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Xv2vcbBp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727035AbgAHLS5 (ORCPT ); Wed, 8 Jan 2020 06:18:57 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:47160 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727855AbgAHLSv (ORCPT ); Wed, 8 Jan 2020 06:18:51 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 008BIlQm061054; Wed, 8 Jan 2020 05:18:47 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1578482327; bh=KN+t6HQRgfBskuoZzha3kzY1YHsWfUc9MOwnVuDHmMs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Xv2vcbBpXb+QPNIe62/DUN498yEViFe47yJ8plcpa+2a5rq3sZZ1me52dkElAXqSQ 3aOlKlk1Jo4NMI7W4PdwfK0ni3lTmj0szfhhS4Cnhali5KevTgAC9qGX/KyJ7pan79 9KaN5TgkAoSio71fYcapU7xR/lGjM5C2Kfou/J8I= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 008BIl15114652 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 8 Jan 2020 05:18:47 -0600 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Wed, 8 Jan 2020 05:18:46 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Wed, 8 Jan 2020 05:18:46 -0600 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 008BIWBu087830; Wed, 8 Jan 2020 05:18:44 -0600 From: Roger Quadros To: CC: , , , , , , , Roger Quadros Subject: [PATCH 5/5] arm64: dts: k3-j721e-proc-board: Add wait time for sampling Type-C DIR line Date: Wed, 8 Jan 2020 13:18:30 +0200 Message-ID: <20200108111830.8482-6-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200108111830.8482-1-rogerq@ti.com> References: <20200108111830.8482-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Type-C compainon chip on the board needs ~133ms (tCCB_DEFAULT) to debounce the CC lines in order to detect attach and plug orientation and reflect the correct DIR status. [1] Let's wait for 300ms before sampling the Type-C DIR line. [1] http://www.ti.com/lit/ds/symlink/tusb321.pdf Signed-off-by: Roger Quadros Signed-off-by: Sekhar Nori --- arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 4d180887342c..1dc6fdc86bc5 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -272,6 +272,7 @@ &serdes_wiz3 { typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>; + typec-dir-debounce-ms = <300>; /* TUSB321, tCCB_DEFAULT 133 ms */ }; &serdes3 {