From patchwork Wed Jan 8 05:23:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Boichat X-Patchwork-Id: 206018 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8CB6EC33C9B for ; Wed, 8 Jan 2020 05:24:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5F8CE20720 for ; Wed, 8 Jan 2020 05:24:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="S3tVQZXg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725838AbgAHFYY (ORCPT ); Wed, 8 Jan 2020 00:24:24 -0500 Received: from mail-pg1-f195.google.com ([209.85.215.195]:34790 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726694AbgAHFYQ (ORCPT ); Wed, 8 Jan 2020 00:24:16 -0500 Received: by mail-pg1-f195.google.com with SMTP id r11so987370pgf.1 for ; Tue, 07 Jan 2020 21:24:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tLPzDvqsyKjpMgl6ZY+ZEjymtgHHsFzBQXHTW4eiM1M=; b=S3tVQZXgAvZAvGKT4jucRDlF/M0TWOh+3V7E9ZFoKg0xoIXSRxIr5TYGLCUnvTfS9N f+oKg6lg9u0QxJzV+FId6ptqevsKmNbYDMNZJ9DJAVLRY/8KFELoCSNhdge1SKfgY0Xy AuK7NrZkfWLHM89vkHp0eJTBqDJW+EynagsuQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tLPzDvqsyKjpMgl6ZY+ZEjymtgHHsFzBQXHTW4eiM1M=; b=XtW1U8esLWAML/evGPtiU5RX3nC/QHk5HrKLjM7iWQWZ0fnT6LhRJ+0jOT8Pt4RaU0 IVLCr62TLMpDvs2WXaVMrs/QXImouck0NUuoqzZvOnpysCmJhS24v96zgg/lcd7hnsq/ Zk2zf30SBY2sYIR1Ey46kELBt0bsge1ujt9n/ncMZFcCSjqYsAG7U/Y/NI1hsZl44/o/ AoqNfJJyvKtQEhgovzvOyO/SMSPi9pFycfJ0qsfDFIDwCckik0IncsRmzIfC6XgDL6Qk Yjgb1X5C5dTySuDxknZP3HLtMnp47DC8MqsDhgLMJHF6bYHs7JxB+AUO8166QtDGI38m UkPg== X-Gm-Message-State: APjAAAWh3pbmwcrNGEk5CI4d82elrxsUw6Q9i2EIVIZo/8vjzeCzH0an 5Ic7BNOUFZuFrXo55ZUKjXbSZg== X-Google-Smtp-Source: APXvYqzoefkOYFH4FXTTMbYJDxtsQiuVsYfMMaYxsSll0XpoVzmSh/ccdl9HE7eeGAdfYbzMduo/6Q== X-Received: by 2002:a63:ed56:: with SMTP id m22mr3334545pgk.261.1578461055680; Tue, 07 Jan 2020 21:24:15 -0800 (PST) Received: from drinkcat2.tpe.corp.google.com ([2401:fa00:1:b:d8b7:33af:adcb:b648]) by smtp.gmail.com with ESMTPSA id n24sm387505pff.12.2020.01.07.21.24.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2020 21:24:15 -0800 (PST) From: Nicolas Boichat To: Rob Herring Cc: David Airlie , Daniel Vetter , Mark Rutland , Matthias Brugger , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , Liam Girdwood , Mark Brown , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, hsinyi@chromium.org Subject: [PATCH v2 7/7, RFC]: drm/panfrost: devfreq: Add support for 2 regulators Date: Wed, 8 Jan 2020 13:23:37 +0800 Message-Id: <20200108052337.65916-8-drinkcat@chromium.org> X-Mailer: git-send-email 2.24.1.735.g03f4e72817-goog In-Reply-To: <20200108052337.65916-1-drinkcat@chromium.org> References: <20200108052337.65916-1-drinkcat@chromium.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Bifrost GPU on MT8183 uses 2 regulators (core and SRAM) for devfreq, and provides OPP table with 2 sets of voltages. TODO: This is incomplete as we'll need add support for setting a pair of voltages as well. Signed-off-by: Nicolas Boichat --- drivers/gpu/drm/panfrost/panfrost_devfreq.c | 18 ++++++++++++++++++ drivers/gpu/drm/panfrost/panfrost_device.h | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c index 413987038fbfccb..5eb0effded7eb09 100644 --- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c +++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c @@ -79,6 +79,22 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) struct devfreq *devfreq; struct thermal_cooling_device *cooling; + /* If we have 2 regulator, we need an OPP table with 2 voltages. */ + if (pfdev->regulator_sram) { + const char * const reg_names[] = { "mali", "sram" }; + + pfdev->devfreq.dev_opp_table = + dev_pm_opp_set_regulators(dev, + reg_names, ARRAY_SIZE(reg_names)); + if (IS_ERR(pfdev->devfreq.dev_opp_table)) { + ret = PTR_ERR(pfdev->devfreq.dev_opp_table); + pfdev->devfreq.dev_opp_table = NULL; + dev_err(dev, + "Failed to init devfreq opp table: %d\n", ret); + return ret; + } + } + ret = dev_pm_opp_of_add_table(dev); if (ret == -ENODEV) /* Optional, continue without devfreq */ return 0; @@ -119,6 +135,8 @@ void panfrost_devfreq_fini(struct panfrost_device *pfdev) if (pfdev->devfreq.cooling) devfreq_cooling_unregister(pfdev->devfreq.cooling); dev_pm_opp_of_remove_table(&pfdev->pdev->dev); + if (pfdev->devfreq.dev_opp_table) + dev_pm_opp_put_regulators(pfdev->devfreq.dev_opp_table); } void panfrost_devfreq_resume(struct panfrost_device *pfdev) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h index 92d471676fc7823..581da3fe5df8b17 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -91,10 +91,12 @@ struct panfrost_device { struct { struct devfreq *devfreq; struct thermal_cooling_device *cooling; + struct opp_table *dev_opp_table; ktime_t busy_time; ktime_t idle_time; ktime_t time_last_update; atomic_t busy_count; + struct panfrost_devfreq_slot slot[NUM_JOB_SLOTS]; } devfreq; };