From patchwork Sun Jan 5 10:45:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chao Hao X-Patchwork-Id: 206174 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75082C3F68F for ; Sun, 5 Jan 2020 10:46:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4C6DF24650 for ; Sun, 5 Jan 2020 10:46:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Ww6JLIeo" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726494AbgAEKqk (ORCPT ); Sun, 5 Jan 2020 05:46:40 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:2590 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726360AbgAEKqi (ORCPT ); Sun, 5 Jan 2020 05:46:38 -0500 X-UUID: 5338576dd763456d810138b6743bd429-20200105 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=WZ/umlXOyPHUYCRi2U9EvlX0wVfU8S8+Ftnq58VNe5M=; b=Ww6JLIeodifH780mh1kn6g0ShhkKaZ9N7wOg/1n6rCumMsiSmbUd3ApICeVbbTevMGEg28fnWlszyfZ26PZmDx/2p4VFJHoUk5xpKsicHNgXB9Pm9CZiTtHHqeotjqAdqQIgXvF7Qr2jWjChlCJoZeIgUJs860ClYWI448JGoWs=; X-UUID: 5338576dd763456d810138b6743bd429-20200105 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 866995537; Sun, 05 Jan 2020 18:46:31 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sun, 5 Jan 2020 18:46:05 +0800 Received: from localhost.localdomain (10.15.20.246) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sun, 5 Jan 2020 18:45:01 +0800 From: Chao Hao To: Joerg Roedel , Rob Herring , Matthias Brugger CC: , , , , , , Chao Hao , Jun Yan , Cui Zhang , Yong Wu , Anan Sun Subject: [PATCH v2 02/19] iommu/mediatek: Add m4u1_mask to distinguish m4u_id Date: Sun, 5 Jan 2020 18:45:06 +0800 Message-ID: <20200105104523.31006-3-chao.hao@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200105104523.31006-1-chao.hao@mediatek.com> References: <20200105104523.31006-1-chao.hao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For some platforms(ex: later mt6779), it maybe have two IOMMUs, so we can add m4u_mask variable to distinguish it by different smi_larb id Signed-off-by: Chao Hao --- drivers/iommu/mtk_iommu.c | 3 +++ drivers/iommu/mtk_iommu.h | 2 ++ 2 files changed, 5 insertions(+) -- 2.18.0 diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 6fc1f5ecf91e..09192edef1f7 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -678,6 +678,9 @@ static int mtk_iommu_probe(struct platform_device *pdev) } data->larb_imu[id].dev = &plarbdev->dev; + if (data->plat_data->m4u1_mask == (1 << id)) + data->m4u_id = 1; + component_match_add_release(dev, &match, release_of, compare_of, larbnode); } diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h index ea949a324e33..b4bd76548615 100644 --- a/drivers/iommu/mtk_iommu.h +++ b/drivers/iommu/mtk_iommu.h @@ -42,6 +42,7 @@ struct mtk_iommu_plat_data { bool has_bclk; bool has_vld_pa_rng; bool reset_axi; + u32 m4u1_mask; unsigned char larbid_remap[MTK_LARB_NR_MAX]; }; @@ -59,6 +60,7 @@ struct mtk_iommu_data { bool enable_4GB; spinlock_t tlb_lock; /* lock for tlb range flush */ + u32 m4u_id; struct iommu_device iommu; const struct mtk_iommu_plat_data *plat_data;