From patchwork Tue Oct 22 13:22:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 177156 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp4858552ill; Tue, 22 Oct 2019 06:23:17 -0700 (PDT) X-Google-Smtp-Source: APXvYqxb7Ve7ahm26PM0BombPZlumMqYIZeAhEJSkplsj7BkvFdXMzlZiLPZBq6pWgIdg4Muwo+D X-Received: by 2002:a17:906:6bcd:: with SMTP id t13mr16384879ejs.231.1571750597836; Tue, 22 Oct 2019 06:23:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571750597; cv=none; d=google.com; s=arc-20160816; b=LgXw0iOymjhr7X6ZLgV1wSKXdAJEii1Dmz+nvAE8s6spr0c7RSf7ndOrcsSL27fe03 GTstC4o8dMlFlUW4j7JrMcIJjZH9rxtwIxZ/CLFyVVRdD8yldEoDw08oP74AcEIjfOJH 9Wwqmhzq4J/sGSy2/wsJUUmLBcRX9RYe8H218JNv1thPNwyB1WcKCwCTOwI2SVPje/le xjqom1sjWLzq5cqdpQhKVDh/3+/g28M31mKws1geI2+Ba93ncgMV4D+Wz9FD/ktFChIW K0vFxrIKff9ZGkdr3P9aie0RfLIPrH72RGG7t+URYu5VYDv+Bqtp8u39gj4xo50+pJm7 J0cw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=gR7OAXsQc4OiOhV7DWYE58CP8SVL3y7X8+jWjC3qNZ0=; b=x8ptS5qOom90zoVH1PYAqokSuotBrzBoLWNzvfh0bqIR83KRB2JCs50l3m2hINrp7V NwtDBPpsZUN4lYA8kwcF0aoqj2A/vBzrfXceLgMkE0s9vdDSi8i01lA+YssHmNUQUE3Q 8d4r4BPn+3RtOmsU8EaqVg4iVQfXAYGiKenzp6COK51EOIa5AKsQZzGDrhBul3yArLb7 sppSH6M+F3g7Zglq5KGY979RJ/aiX0rtmL8RpJ0vdO0PYgCZnqSNB+iAHH5oDvza6QkS /hklOMaNi9+rb0F/m87BW1QDF8XcFAQNbSnPU7TvUXb4uGpZHAmv3faC9oY4G1w0EPNx SyUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=KZY93pcE; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ck18si10549547ejb.300.2019.10.22.06.23.17; Tue, 22 Oct 2019 06:23:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=KZY93pcE; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387997AbfJVNXR (ORCPT + 8 others); Tue, 22 Oct 2019 09:23:17 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:32930 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387966AbfJVNXQ (ORCPT ); Tue, 22 Oct 2019 09:23:16 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9MDNEtS003725; Tue, 22 Oct 2019 08:23:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1571750594; bh=gR7OAXsQc4OiOhV7DWYE58CP8SVL3y7X8+jWjC3qNZ0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=KZY93pcExSDQEi9oLzUIIiXl5q/7TsnHy7jPRnKLrHCT/ic5AslsO5BpI+RJWXNSz UzZ6hLRY1vnJdVC4MEM4vE9oC56pDT12OHWZSac9Jnze3/RXTEE7PxoAD9cWAeUY6c rVjbxsMV93eHx9x6tavZtyC4A6WmRRQh98BHdcqY= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9MDNEc6068197 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 22 Oct 2019 08:23:14 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 22 Oct 2019 08:23:13 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 22 Oct 2019 08:23:04 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9MDMpla126427; Tue, 22 Oct 2019 08:22:56 -0500 From: Roger Quadros To: CC: , , , , , , Roger Quadros Subject: [PATCH 2/3] dt-bindings: phy: ti, phy-j721e-wiz: Add Type-C dir GPIO Date: Tue, 22 Oct 2019 16:22:48 +0300 Message-ID: <20191022132249.869-3-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191022132249.869-1-rogerq@ti.com> References: <20191022132249.869-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This is an optional GPIO, if specified will be used to swap lane 0 and lane 1 based on GPIO status. This is required to achieve plug flip support for USB Type-C. Type-C companions typically need some time after the cable is plugged before and before they reflect the correct status of Type-C plug orientation on the DIR line. Type-C Spec specifies CC attachment debounce time (tCCDebounce) of 100 ms (min) to 200 ms (max). Allow the DT node to specify the time (in ms) that we need to wait before sampling the DIR line. Signed-off-by: Roger Quadros Signed-off-by: Sekhar Nori --- .../devicetree/bindings/phy/ti,phy-j721e-wiz.txt | 9 +++++++++ 1 file changed, 9 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.txt b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.txt index 19b4c3e855d6..253535a8819f 100644 --- a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.txt +++ b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.txt @@ -24,6 +24,15 @@ Optional properties: assigned-clocks and assigned-clock-parents: As documented in the generic clock bindings in Documentation/devicetree/bindings/clock/clock-bindings.txt + - typec-dir-gpios: GPIO to signal Type-C cable orientation for lane swap. + If GPIO is active, lane 0 and lane 1 of SERDES will be swapped to + achieve the funtionality of an exernal type-C plug flip mux. + + - typec-dir-debounce: Number of milliseconds to wait before sampling + typec-dir-gpio. If not specified, the GPIO will be sampled ASAP. + Type-C spec states minimum CC pin debounce of 100 ms and maximum + of 200 ms. + Required subnodes: - Clock Subnode: WIZ node should have '3' subnodes for each of the clock selects it supports. The clock subnodes should have the following names