From patchwork Tue Oct 8 12:55:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 175482 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp5662581ill; Tue, 8 Oct 2019 05:56:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqzTx+69d3mVRpDXN7f7gRQ1tYQN8ftKoRcACCqxsgW9iQHhhZdq+3p4SUDel9YFArbi/nji X-Received: by 2002:a50:fd86:: with SMTP id o6mr33880209edt.139.1570539362981; Tue, 08 Oct 2019 05:56:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570539362; cv=none; d=google.com; s=arc-20160816; b=LJ2qgsQeRTF87eKRA0MUqIkhRG/EmiCrxR5jwNeiB6UFT+SWqawKbdvm6BRvaVf5fk /Au/P2OLSGvx7vjwogKNwiTI2nOTeBeAkvR0VwBU0fU5N3n12ev8ohS0n3I2/QpXkIbg YgpIYQnt6jmk291K9oaT/OJSeZetQTFruFyDXnb9am4fZrztfem7EmsibwlxW7Agphkd 39dw5dewT57FKNCxWPg3p58FlyGmTy0Ig/uRmqSG8pbaqiehq6XTEkqgz4xCTT4tfxzM LOjy1E3SuyUuazD7latwZ5RO8UI9qdKmNfgaLgpxwbAJTBiPZg2ThvCYvbOMQJ6BCwck hBAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=5NjhrYu8nXMN27ChfH5ORG8Z1ERJZGAOrQx8/HEKMSw=; b=WoVYmLBqvhFo1rBKbJvj4/3+WadvffiH7NIiDqeSwpUrnZZNC9D3LI8I81wr8ByVfm 3F7f7kos7KTRRUKrg4fgY2XOKE4BwgZ5h6vqqxJMLNSXeWD5rp7IrwEdSgpIzNw3aizM MyBs4/JfDXs8Wnd0C7rD4Ht9+R+MEbIntm5yV673KjsQ8GDflVO4x9N473zVSag+G7PQ FUd7QRGOspnpLMaoatNFbU4fdgSh7n97E1Vbcqna7YamqczR9/MAJXKv2NTY8KziW0F/ 8yaPsTDIyLBspqv3Swiz68TLaVuKXkEO6rRBLqQZ1j5FuaxpsQ5F4ESfNYehc7ttCjlt AdUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hnL6JwOU; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r18si8900282ejr.189.2019.10.08.05.56.02; Tue, 08 Oct 2019 05:56:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hnL6JwOU; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730829AbfJHM4C (ORCPT + 8 others); Tue, 8 Oct 2019 08:56:02 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:35978 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730555AbfJHM4C (ORCPT ); Tue, 8 Oct 2019 08:56:02 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x98CtpQB128825; Tue, 8 Oct 2019 07:55:51 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1570539351; bh=5NjhrYu8nXMN27ChfH5ORG8Z1ERJZGAOrQx8/HEKMSw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hnL6JwOUbAorQa+JlkF66iuqQ+gwHIGnxi9pDSazL1cvBxeLvz7nEAhddwzWBNO3C BuGFjVSTOMU9TIhAaftNJ/Oq4D0IDEVue4lT6Xmmq4Sg09LVnPMI2QM/Hs+TGSFJWY eHKhmGTLA/ezwiihGUit7uPFarYYSy7aze4/3Aho= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x98CtpAT104014; Tue, 8 Oct 2019 07:55:51 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 8 Oct 2019 07:55:48 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 8 Oct 2019 07:55:50 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x98Ctk58046741; Tue, 8 Oct 2019 07:55:49 -0500 From: Tero Kristo To: , CC: , , , , Subject: [PATCHv8 1/9] dt-bindings: omap: add new binding for PRM instances Date: Tue, 8 Oct 2019 15:55:36 +0300 Message-ID: <20191008125544.20679-2-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191008125544.20679-1-t-kristo@ti.com> References: <20191008125544.20679-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add new binding for OMAP PRM (Power and Reset Manager) instances. Each of these will act as a power domain controller and potentially as a reset provider. Signed-off-by: Tero Kristo Reviewed-by: Rob Herring Reviewed-by: Tony Lindgren --- v7: - dropped clocks property from example .../devicetree/bindings/arm/omap/prm-inst.txt | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/omap/prm-inst.txt -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt new file mode 100644 index 000000000000..dfe7c7789ca7 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt @@ -0,0 +1,29 @@ +OMAP PRM instance bindings + +Power and Reset Manager is an IP block on OMAP family of devices which +handle the power domains and their current state, and provide reset +handling for the domains and/or separate IP blocks under the power domain +hierarchy. + +Required properties: +- compatible: Must contain one of the following: + "ti,am3-prm-inst" + "ti,am4-prm-inst" + "ti,omap4-prm-inst" + "ti,omap5-prm-inst" + "ti,dra7-prm-inst" + and additionally must contain: + "ti,omap-prm-inst" +- reg: Contains PRM instance register address range + (base address and length) + +Optional properties: +- #reset-cells: Should be 1 if the PRM instance in question supports resets. + +Example: + +prm_dsp2: prm@1b00 { + compatible = "ti,omap-prm-inst", "ti,dra7-prm-inst"; + reg = <0x1b00 0x40>; + #reset-cells = <1>; +};