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[209.132.180.67]) by mx.google.com with ESMTP id 66si10670205plc.428.2019.08.26.13.45.21; Mon, 26 Aug 2019 13:45:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CEDRSS3J; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731535AbfHZUpU (ORCPT + 8 others); Mon, 26 Aug 2019 16:45:20 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:41752 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731587AbfHZUpU (ORCPT ); Mon, 26 Aug 2019 16:45:20 -0400 Received: by mail-wr1-f66.google.com with SMTP id j16so16574635wrr.8 for ; Mon, 26 Aug 2019 13:45:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Xx6zXzgb0vSpbhX3JZnxws+z9jl06fZin+m9UbiBa6U=; b=CEDRSS3J1v//1C8W0S/Dm2bDZoR3U7cM6SpNQPaC9aCNkRuGvkpUnVguzMnLDlfW9y Zdda6LAOMYaBAwO2eF0g/pl/luDQcohjoDKyATRtyX3XqDNHXZHA/oyF8ICWyCeTCqgY mdBron9n4N1xk805CkMnqK5lhWChg56DyLUwO0TmhqBmy/Flc4jh399CLyogsXoP2O1/ N9gdTF0x6jCLgr4StWZI9S4Jx/xHewzOzzLJ4LsrGPeYkbyp3D1lMQ2+Aq9IrAgSNiH0 Ir7KGWT9WSe6afAge8Ezu24kz49v+UAbzcTUns/Vjo/WZexcEJErxHmOj8rPeOqe0Mj9 ae8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Xx6zXzgb0vSpbhX3JZnxws+z9jl06fZin+m9UbiBa6U=; b=FXYqrlc5Tsjpy95mUw6dhjn0JUgb+N2CY+657z49tP+U0bxt8L0VNTe0hp+7/qNHRs gm8TbzSjoexKokr3iLlY99mMFjGjdCKc6AXQIJSU4+7HgIyRaksaRho26sSvZhwyLfRS 1EoPH+OBw7nxv8Ny0E1GRso6VFUtHclTYF2bqJ8HPE+qKTJkOzp0M/4LE2LtQyhxOSeA veci00UCipptmMskn6lApuaxaOHXo+7uTmLxEEIz7eFfkz9YT+6Z0l0oOq4LRqYqx0+Q PiOvmC6HkcRuCDsbIfnckwUxrG6KsfPXcS8ZWmT6h5bz9AWOS47+byoFno5nrAKaGUB1 EMHw== X-Gm-Message-State: APjAAAWMLuBXAvXLh+da/FVHqVM6odnZktHxn/TDLj8DhGmzon0subR3 e428T1qYoOKFASE9YsmDkYB3Pg== X-Received: by 2002:a5d:6a45:: with SMTP id t5mr23999753wrw.228.1566852317991; Mon, 26 Aug 2019 13:45:17 -0700 (PDT) Received: from mai.imgcgcw.net ([2a01:e34:ed2f:f020:f881:f5ed:b15d:96ab]) by smtp.gmail.com with ESMTPSA id 20sm549557wmk.34.2019.08.26.13.45.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Aug 2019 13:45:16 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Magnus Damm , Rob Herring , Mark Rutland , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH 17/20] dt-bindings: timer: renesas, cmt: Add CMT0 and CMT1 to r8a77995 Date: Mon, 26 Aug 2019 22:44:04 +0200 Message-Id: <20190826204407.17759-17-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190826204407.17759-1-daniel.lezcano@linaro.org> References: <20190826204407.17759-1-daniel.lezcano@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Magnus Damm This patch adds DT binding documentation for the CMT devices on the R-Car Gen3 D3 (r8a77995) SoC. Signed-off-by: Magnus Damm Reviewed-by: Geert Uytterhoeven Reviewed-by: Rob Herring Reviewed-by: Simon Horman Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/timer/renesas,cmt.txt | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index 5b7690ae8b9d..c7fdcb02e083 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -53,6 +53,8 @@ Required Properties: - "renesas,r8a77980-cmt1" for the 48-bit CMT1 device included in r8a77980. - "renesas,r8a77990-cmt0" for the 32-bit CMT0 device included in r8a77990. - "renesas,r8a77990-cmt1" for the 48-bit CMT1 device included in r8a77990. + - "renesas,r8a77995-cmt0" for the 32-bit CMT0 device included in r8a77995. + - "renesas,r8a77995-cmt1" for the 48-bit CMT1 device included in r8a77995. - "renesas,sh73a0-cmt0" for the 32-bit CMT0 device included in sh73a0. - "renesas,sh73a0-cmt1" for the 48-bit CMT1 device included in sh73a0. - "renesas,sh73a0-cmt2" for the 32-bit CMT2 device included in sh73a0.