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[209.132.180.67]) by mx.google.com with ESMTP id a18si6416425pgk.150.2019.05.29.02.19.48; Wed, 29 May 2019 02:19:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PziiElIt; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725914AbfE2JTs (ORCPT + 7 others); Wed, 29 May 2019 05:19:48 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:39702 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725911AbfE2JTs (ORCPT ); Wed, 29 May 2019 05:19:48 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x4T9Jfk8009982; Wed, 29 May 2019 04:19:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1559121581; bh=f9yWrCu6QwQFUN0RZDguN6Dz/yvzTBh+L7s5j+aLQro=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=PziiElItn97hefl6Dg1dYBIIJl5zziulP+vKFY/z6mpiQW/amqpmpJrtpNQinikRJ zTdaRTIPpxDRDdfZBYVyoMsEhZ0nFW6OqPIQ7ahBtHVV9Ug6gtlOGvAcwcn/oOMmvR S1XArXgIptIyk5zRVkzZ8mrKdpBvfi6FpevByoOM= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x4T9Jf3r050378 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 29 May 2019 04:19:41 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 29 May 2019 04:19:41 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 29 May 2019 04:19:41 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x4T9JVxP079377; Wed, 29 May 2019 04:19:38 -0500 From: Kishon Vijay Abraham I To: Tero Kristo , Nishanth Menon CC: Rob Herring , Mark Rutland , , , , Kishon Vijay Abraham I Subject: [PATCH 2/6] arm64: dts: k3-am6: Add mux-controller DT node required for muxing SERDES Date: Wed, 29 May 2019 14:48:08 +0530 Message-ID: <20190529091812.20764-3-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190529091812.20764-1-kishon@ti.com> References: <20190529091812.20764-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add mux-controller DT node as a child node of scm_conf. This is required for muxing SERDES between USB, PCIe and ICSS2 SGMII. Signed-off-by: Kishon Vijay Abraham I --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 81e97d7adcc9..99d2402455d1 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -233,6 +233,13 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x00100000 0x1c000>; + + serdes_mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x4080 0x3>, /* SERDES0 lane select */ + <0x4090 0x3>; /* SERDES1 lane select */ + }; }; dwc3_0: dwc3@4000000 {