From patchwork Fri May 10 16:49:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 163902 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:142:0:0:0:0 with SMTP id j2csp2619149ilr; Fri, 10 May 2019 09:50:10 -0700 (PDT) X-Google-Smtp-Source: APXvYqywXih8bLk2tzhtmLSdIIHqp93+M7MoLxCyzrQ2iE94xwg+ZBlk2q1J5pl8BAfnTH1HpLMS X-Received: by 2002:a17:902:a60e:: with SMTP id u14mr11260659plq.94.1557507009911; Fri, 10 May 2019 09:50:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557507009; cv=none; d=google.com; s=arc-20160816; b=mBUTkEORPOCb7hAS9YG2Lx3a5TMB5WUsOzheBhyFgt+w4ayKzJMdF2RsmEvA+KplXu VDEOtqFM3vPva6a+rXrXN5mmYxQSx06E739KE6r03y1K7QS59pE4dJwibVRvPMDDUGcM JbILQbQWIXFxeSRrg3QIcaxiPBq5LBCGND/ywsT+mQD5T3ygUU1BYo1bdM6sL0F/z51S Kod701oSOH8uscjpcmE8ippHdP1Q8e0P/LcZErfvFU+zZHE43AV43sxwavEsh9b8+GHe Ys0Ua0yJ1iupgKtvY30PS8ifJqf6B9+Z5VlmgA2LgKtGhpvcWUMpbkmd8WwziiVDBcq0 C3/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ymMWA7qGWKTKg4sjga2JHa1g3AkDQJanr/hpUl4TY20=; b=Yi5uUtsVQv2ISRC0k/9wvO83aYt3cRBjciABxAFZ2bDrvJ0q6HQIuIq5YrB7xplRN9 vNbg7pPEw04RrGBeFMrUAnO8YzfNbCEOkAjlZnscAqEG/3/B8mj/90pr9+OEAe7FC8eA 6MjvuachZicmV9gcMcWo6fyrS2En/BJ4dy6zSxg1S3qUf4CQVSbG3ktLq1TCxzPx33xW +Rte67n26WC224VRf9de86MF19Eim426c7ymPabLZHX7PcPUIbSzJI/1pz7c7Rbu3TJY 977m3LsqOQ0pEqISZTb46JqVzuUEpICcXp49N9OH0ghsBuo4Ct/h2rvqEPcel/z8Jxxi lF+Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=VD9DKzz9; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o186si8613518pgo.423.2019.05.10.09.50.09; Fri, 10 May 2019 09:50:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=VD9DKzz9; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727723AbfEJQtt (ORCPT + 7 others); Fri, 10 May 2019 12:49:49 -0400 Received: from mail-wr1-f65.google.com ([209.85.221.65]:33948 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727496AbfEJQtt (ORCPT ); Fri, 10 May 2019 12:49:49 -0400 Received: by mail-wr1-f65.google.com with SMTP id f7so8682299wrq.1 for ; Fri, 10 May 2019 09:49:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ymMWA7qGWKTKg4sjga2JHa1g3AkDQJanr/hpUl4TY20=; b=VD9DKzz95+nkF7M2qPqLJnLBiyRHTWMc45ShguOvHFsS+EbnWctH6q8qU2PaWi+MH2 3DngXRS+8cYv2kTg4Yw8kJZRL2SGdgZLBo1a5DuSE1HN+qglmY++uOR02Abm+c5mlK1t wwPKvXg7TRDc8Dq5Ip+lyC8r4zF+jmDXLlIJ0OSrcIxbzQjxboRH/8yfM/mx1RdugAAj z17GQCVWWdsPK2DstD09KmUPn/E4jjb4WN4CrRjC1mq0/VqGTV7KnVcEjZIYHUAbTX5H ATm4YXxTJqEu/vy4UEJwmolN1lLDuDsmVs9dZnehUYhAmWdsphVJXAcaPaPNthAKmlHu W36g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ymMWA7qGWKTKg4sjga2JHa1g3AkDQJanr/hpUl4TY20=; b=FE4Jx1/ZvWtmCFnr7Pm0X0EwfFb0xSFuu8MwzIvLrUH/eTB29Ut+Cu0ZiLt9jG6KDo zP3VcI57wLoNpJugnvikWWOyywvnSHu//t6ySopb8WU1GGKckkyAEPqxAAjHN3n+rNTk vIWuwUCkBK2Hb79BNCGdMP4WkBdb/v2kbluAsWtsahtnTIyK1VI8EdF3w7Yob4Qao4Rj qC5DDvw2/UZauV7+GYC9FZQG5NnOu1NTAYQtR0etS7ZdMGW085v4uIfkPTGNqEVhhSdO TQylHkc5tSYjjPlnjU9bChXkNIYfn5xyOwQgn0+L3/wR+tDyMlS/HK3g2dFoB1qa71rB A1Ag== X-Gm-Message-State: APjAAAUzqQaC3xHlGffQKh0PJXsEkAjwXz/6YzIzs96C7uz0TPxYedP6 RYQOvgz68e5wtIankLlOMMPc4w== X-Received: by 2002:adf:e8c4:: with SMTP id k4mr8969231wrn.9.1557506987191; Fri, 10 May 2019 09:49:47 -0700 (PDT) Received: from boomer.local (lmontsouris-657-1-212-31.w90-63.abo.wanadoo.fr. [90.63.244.31]) by smtp.googlemail.com with ESMTPSA id q26sm5114308wmq.25.2019.05.10.09.49.46 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 10 May 2019 09:49:46 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/5] arm64: dts: meson: g12a: add ethernet pinctrl definitions Date: Fri, 10 May 2019 18:49:37 +0200 Message-Id: <20190510164940.13496-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190510164940.13496-1-jbrunet@baylibre.com> References: <20190510164940.13496-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the ethernet pinctrl settings for RMII, RGMII and internal phy leds Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 37 +++++++++++++++++++++ 1 file changed, 37 insertions(+) -- 2.20.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index a32db09809f7..fe0f73730525 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -206,6 +206,43 @@ }; }; + eth_leds_pins: eth-leds { + mux { + groups = "eth_link_led", + "eth_act_led"; + function = "eth"; + bias-disable; + }; + }; + + eth_rmii_pins: eth-rmii { + mux { + groups = "eth_mdio", + "eth_mdc", + "eth_rgmii_rx_clk", + "eth_rx_dv", + "eth_rxd0", + "eth_rxd1", + "eth_txen", + "eth_txd0", + "eth_txd1"; + function = "eth"; + bias-disable; + }; + }; + + eth_rgmii_pins: eth-rgmii { + mux { + groups = "eth_rxd2_rgmii", + "eth_rxd3_rgmii", + "eth_rgmii_tx_clk", + "eth_txd2_rgmii", + "eth_txd3_rgmii"; + function = "eth"; + bias-disable; + }; + }; + hdmitx_ddc_pins: hdmitx_ddc { mux { groups = "hdmitx_sda",