Message ID | 20190508224309.5744-2-bjorn.andersson@linaro.org |
---|---|
State | New |
Headers | show
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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id 25sm320494pfo.145.2019.05.08.15.43.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 08 May 2019 15:43:13 -0700 (PDT) From: Bjorn Andersson <bjorn.andersson@linaro.org> To: Andy Gross <agross@kernel.org>, David Brown <david.brown@linaro.org> Cc: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 1/3] arm64: dts: qcom: qcs404: Make gcc as reset-controller Date: Wed, 8 May 2019 15:43:07 -0700 Message-Id: <20190508224309.5744-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190508224309.5744-1-bjorn.andersson@linaro.org> References: <20190508224309.5744-1-bjorn.andersson@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: <devicetree.vger.kernel.org> X-Mailing-List: devicetree@vger.kernel.org |
Series |
arm64: dts: qcom: qcs404: Enable PCIe
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diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index ffedf9640af7..65a2cbeb28be 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -383,6 +383,7 @@ compatible = "qcom,gcc-qcs404"; reg = <0x01800000 0x80000>; #clock-cells = <1>; + #reset-cells = <1>; assigned-clocks = <&gcc GCC_APSS_AHB_CLK_SRC>; assigned-clock-rates = <19200000>;
GCC is a reset-controller, so define #reset-cells. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- Changes since v3: - Split single patch, no functional change arch/arm64/boot/dts/qcom/qcs404.dtsi | 1 + 1 file changed, 1 insertion(+) -- 2.18.0