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[209.132.180.67]) by mx.google.com with ESMTP id k12si18206336plt.28.2019.04.24.05.03.29; Wed, 24 Apr 2019 05:03:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KvImkMX1; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726211AbfDXMD2 (ORCPT + 7 others); Wed, 24 Apr 2019 08:03:28 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:37220 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729109AbfDXMD2 (ORCPT ); Wed, 24 Apr 2019 08:03:28 -0400 Received: by mail-pl1-f195.google.com with SMTP id w23so9213147ply.4 for ; Wed, 24 Apr 2019 05:03:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=K9GlpFCd2DOdgM3fSdxL4T71FjdIxk/5Xu8NSCGxtGQ=; b=KvImkMX1Rd5Ulv3d/JOyrloTLqwwyZOiJlUX4mmAACZGmD7mYS8uxB8mCwtaW8CcZS 6yMmf547hO97euAwcusstIgoAkMfssjQQTo69iNePnw7IqojK5QCFqAabbsyIKhjFUEE TdcyIfE8LctErMAzlfG/+q76vEW6LAEtJZaOnI2N29rw6gLxbn2zSVbeuoQxy+UPsz7H sxFBtgWaO0KGxOQ4DEw1Kjun0RC5kdkhQL7DinuYnWaQ+Yo83Wi6McZD6GZtr/BvKKga iWo0vhqv4rADc6Y/6qT7/pfuzNnScb//YcxNP+Zz0dd3GhGvJ5P3CW/Ow5AWR31LgnLI Oodg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=K9GlpFCd2DOdgM3fSdxL4T71FjdIxk/5Xu8NSCGxtGQ=; b=SlMT5/9rkK/zO8fLKH4rV/hymxtHRoNFNbrwKN9KRcup08M/SgRWM8BQHeL1z/UUfl S20dzsSNl2YgZQEH50bBiy/QXRj95mOQIzc3DYN2vZ62cDdKNteR60qrxufFkAgtj/SI yehdAW7IHbz59cnIw4LOY1LEOKqwP7sR38So4k7L9Jytxfey8Wf1FFwrqfxBFAD5QzFi TCOHtEyNwNofGTBPMWZte5HWb7M/oZ26yVjOLZVN3e4ywlLiwNDkheoM/pP64GbF2ewk 0EctgodnSu6Tck9AiViwAnttx+5VIJZ3k4vPnNRqheRc4V5hIJH/z0qixBzO9DlL7+m0 EgjA== X-Gm-Message-State: APjAAAXEqFZeRXwNncTTAjquHjid/3TLDIo0y/Vt7fyDj4FO2AkXWPhE pRFlsGdXVpEt7KY7HsJxmF7B X-Received: by 2002:a17:902:8349:: with SMTP id z9mr14427599pln.144.1556107407620; Wed, 24 Apr 2019 05:03:27 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:711:bac8:7d48:1fca:4d86:743]) by smtp.gmail.com with ESMTPSA id j22sm25870840pfn.129.2019.04.24.05.03.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Apr 2019 05:03:26 -0700 (PDT) From: Manivannan Sadhasivam To: linus.walleij@linaro.org, robh+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, haitao.suo@bitmain.com, darren.tsao@bitmain.com, linux-gpio@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH 2/5] arm64: dts: bitmain: Add pinctrl support for BM1880 SoC Date: Wed, 24 Apr 2019 17:32:21 +0530 Message-Id: <20190424120224.22660-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190424120224.22660-1-manivannan.sadhasivam@linaro.org> References: <20190424120224.22660-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add pinctrl support for Bitmain BM1880 SoC. This SoC only supports pinmuxing and the pinctrl registers are part of the sctrl block. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/bitmain/bm1880.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi index 55a4769e0de2..fdfdc65d29ef 100644 --- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi +++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi @@ -80,6 +80,20 @@ #interrupt-cells = <3>; }; + sctrl: system-controller@50010000 { + compatible = "bitmain,bm1880-sctrl", "syscon", + "simple-mfd"; + reg = <0x0 0x50010000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x50010000 0x1000>; + + pinctrl: pinctrl@50 { + compatible = "bitmain,bm1880-pinctrl"; + reg = <0x50 0x4B0>; + }; + }; + uart0: serial@58018000 { compatible = "snps,dw-apb-uart"; reg = <0x0 0x58018000 0x0 0x2000>;