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[213.113.123.174]) by smtp.gmail.com with ESMTPSA id v11sm5884443lfb.68.2019.04.07.23.29.28 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 07 Apr 2019 23:29:28 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Imre Kaloz , Krzysztof Halasa Cc: Linus Walleij , devicetree@vger.kernel.org Subject: [PATCH 27/31 v3] soc: ixp4xx: Add DT bindings for IXP4xx NPE Date: Mon, 8 Apr 2019 08:28:27 +0200 Message-Id: <20190408062831.16422-28-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190408062831.16422-1-linus.walleij@linaro.org> References: <20190408062831.16422-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds DT bindings for the Intel IXP4xx Network Processing Engine (NPE). These are three firmware-executing units found in the IXP4xx SoC. These bindings use YAML. Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij --- ChangeLog v2->v3: - Rebased on v5.1-rc1 --- ...ntel,ixp4xx-network-processing-engine.yaml | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml -- 2.20.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml b/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml new file mode 100644 index 000000000000..8cb136c376fb --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 Linaro Ltd. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/firmware/intel-ixp4xx-network-processing-engine.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Intel IXP4xx Network Processing Engine + +maintainers: + - Linus Walleij + +description: | + On the IXP4xx SoCs, the Network Processing Engine (NPE) is a small + processor that can load a firmware to perform offloading of networking + and crypto tasks. It also manages the MDIO bus to the ethernet PHYs + on the IXP4xx platform. All IXP4xx platforms have three NPEs at + consecutive memory locations. They are all included in the same + device node since they are not independent of each other. + +properties: + compatible: + oneOf: + - items: + - const: intel,ixp4xx-network-processing-engine + + reg: + minItems: 3 + maxItems: 3 + items: + - description: NPE0 register range + - description: NPE1 register range + - description: NPE2 register range + +required: + - compatible + - reg + +examples: + - | + npe@c8006000 { + compatible = "intel,ixp4xx-network-processing-engine"; + reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>; + };