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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id o10sm24021680wru.54.2019.03.28.07.25.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Mar 2019 07:25:24 -0700 (PDT) From: Rui Miguel Silva To: Shawn Guo , Rob Herring , Fabio Estevam Cc: Laurent Pinchart , devicetree@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v3 1/5] ARM: dts: imx7s: add mipi phy power domain Date: Thu, 28 Mar 2019 14:25:12 +0000 Message-Id: <20190328142516.30372-2-rui.silva@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190328142516.30372-1-rui.silva@linaro.org> References: <20190328142516.30372-1-rui.silva@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add power domain index 0 related with mipi-phy to imx7s. While at it rename pcie power-domain node to remove pgc prefix. Signed-off-by: Rui Miguel Silva --- arch/arm/boot/dts/imx7s.dtsi | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.21.0 diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index e88f53a4c7f4..9a680d3d6424 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -606,7 +606,13 @@ #address-cells = <1>; #size-cells = <0>; - pgc_pcie_phy: pgc-power-domain@1 { + pgc_mipi_phy: power-domain@0 { + #power-domain-cells = <0>; + reg = <0>; + power-supply = <®_1p0d>; + }; + + pgc_pcie_phy: power-domain@1 { #power-domain-cells = <0>; reg = <1>; power-supply = <®_1p0d>;