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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id l4sm9479711wrf.35.2019.03.19.10.00.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Mar 2019 10:00:20 -0700 (PDT) From: Rui Miguel Silva To: Shawn Guo , Rob Herring , Fabio Estevam Cc: Laurent Pinchart , devicetree@vger.kernel.org, Rui Miguel Silva Subject: [PATCH 3/5] ARM: dts: imx7s: Add video mux, csi and mipi_csi Date: Tue, 19 Mar 2019 17:00:01 +0000 Message-Id: <20190319170003.21261-4-rui.silva@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190319170003.21261-1-rui.silva@linaro.org> References: <20190319170003.21261-1-rui.silva@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree nodes for csi, video multiplexer and mipi-csi. Signed-off-by: Rui Miguel Silva --- arch/arm/boot/dts/imx7s.dtsi | 70 ++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) -- 2.21.0 diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index 792efcd2caa1..1992e32a9731 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include #include "imx7d-pinfunc.h" / { @@ -506,6 +507,29 @@ #mux-control-cells = <0>; mux-reg-masks = <0x14 0x00000010>; }; + + csi_mux { + compatible = "video-mux"; + mux-controls = <&mux 0>; + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + csi_mux_from_mipi_vc0: endpoint { + remote-endpoint = <&mipi_vc0_to_csi_mux>; + }; + }; + + port@2 { + reg = <2>; + + csi_mux_to_csi: endpoint { + remote-endpoint = <&csi_from_csi_mux>; + }; + }; + }; }; ocotp: ocotp-ctrl@30350000 { @@ -709,6 +733,23 @@ status = "disabled"; }; + csi: csi@30710000 { + compatible = "fsl,imx7-csi"; + reg = <0x30710000 0x10000>; + interrupts = ; + clocks = <&clks IMX7D_CLK_DUMMY>, + <&clks IMX7D_CSI_MCLK_ROOT_CLK>, + <&clks IMX7D_CLK_DUMMY>; + clock-names = "axi", "mclk", "dcic"; + status = "disabled"; + + port { + csi_from_csi_mux: endpoint { + remote-endpoint = <&csi_mux_to_csi>; + }; + }; + }; + lcdif: lcdif@30730000 { compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif"; reg = <0x30730000 0x10000>; @@ -718,6 +759,35 @@ clock-names = "pix", "axi"; status = "disabled"; }; + + mipi_csi: mipi-csi@30750000 { + compatible = "fsl,imx7-mipi-csi2"; + reg = <0x30750000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&clks IMX7D_IPG_ROOT_CLK>, + <&clks IMX7D_MIPI_CSI_ROOT_CLK>, + <&clks IMX7D_MIPI_DPHY_ROOT_CLK>; + clock-names = "pclk", "wrap", "phy"; + power-domains = <&pgc_mipi_phy>; + phy-supply = <®_1p0d>; + resets = <&src IMX7_RESET_MIPI_PHY_MRST>; + reset-names = "mrst"; + status = "disabled"; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + + mipi_vc0_to_csi_mux: endpoint { + remote-endpoint = <&csi_mux_from_mipi_vc0>; + }; + }; + }; }; aips3: aips-bus@30800000 {