From patchwork Thu Feb 21 15:44:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 158913 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp634977jaa; Thu, 21 Feb 2019 07:45:35 -0800 (PST) X-Google-Smtp-Source: AHgI3IbExuz5ZSrS/1IIGsjKie035tmdp3OUwNwhx84a3hHpCiweUHNHaNNRG2bKURrIB8m79UMy X-Received: by 2002:a63:f753:: with SMTP id f19mr33880906pgk.437.1550763935074; Thu, 21 Feb 2019 07:45:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550763935; cv=none; d=google.com; s=arc-20160816; b=qjIfIlF9d40DOB35hj4Qu1R6FmxnBt1Z0AZaeIXupBCp8HV9pBsEas6Nb8xAQ+OFxy dFoneZXOxeWPMdoyIGjRAb2px200lDa/UtpC5a1mexhvX7lcTN01n+1Sk8vKfjpjYAeV jwueLlhj3lktDnBHXVvnEQv6qIODqm/c/LfYo5LeurVyW3iImvzJrRGn3P55Xn6wGDeS +pptIoglVVvzUc22MpubUQIp1PibggELi5vg6XhiW78iMg2lrHHvmT6y29YnzgY3XYja L36XOKqkbg2kPHfaf7Lf8CbF6hSrwljbcUlgfoXdQMLji7+GGpbiOhT0IV7oUg06OmNY KpBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=/KRBvvDb8vJ/IUxT9QJ5LwxvIcDsKjNvBeUVd1RADoU=; b=VGwZVcnXVGUGxtb6GuqwSDsYM9BDEqZ2GWIFnjuuCOeeX/Igg74/Jqs6OoFIi9qZMo XE2lqM+pTlrq+BuFq5HAVg6AVoOtU6VQJRuz/aLwsLcqzECa3AtvsWjAtOm02Sik3Y5X XXm01QmKsWem89K9B/wsVhYO8P1aql9mbKuXzu42auXeTLu+osDN7z/vPGoXZfKwnE+a 8iSkf97wjjzpjUfuRSDYoR1cBOFteoVR0tKmU6ZS1Ngchrk702CYloBI3mq4bhYGSskO cHT8nvM7e6CZrZVSJTHYGQeo7FK7fNxFwYeWr4pFzFAhlJSHmCZSHPQl4o9ntHD1cDTH bA6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=k6IOv8NP; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l1si22656470pld.386.2019.02.21.07.45.34; Thu, 21 Feb 2019 07:45:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=k6IOv8NP; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726109AbfBUPpe (ORCPT + 7 others); Thu, 21 Feb 2019 10:45:34 -0500 Received: from mail-lj1-f193.google.com ([209.85.208.193]:34530 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726075AbfBUPpe (ORCPT ); Thu, 21 Feb 2019 10:45:34 -0500 Received: by mail-lj1-f193.google.com with SMTP id l5so20988974lje.1 for ; Thu, 21 Feb 2019 07:45:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/KRBvvDb8vJ/IUxT9QJ5LwxvIcDsKjNvBeUVd1RADoU=; b=k6IOv8NPdHKnwkB3ruTvLUZ6lv4iMw4ZoA1QaBdeOXEaVf9a61ykj6wzVVH/Fxgrlj SSjcb/k4XWkxbbN/jJeZIDtHZOXvp61POLwEMW6/ZK8S2a1mgu4lEc2q992a9KTUafH1 pkRXgTmAjaLhei19rvunYSOW68YltBYWx4r7CIAFRzqtXRgBifd/CnsD2EuY/x2CjNvz unSL01cre4m1YX4MoXz1IzSrhBtJJaFaSDKjK+vZFloy8Csp+nopDx8+3nhMEihg2SXR mBTcmlSTFEIW0VM2ymYyZGe0L6zzMdXxUw8SUXhgH2ue75X6afgfpWNkWjHqUyNsjYR3 e/zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/KRBvvDb8vJ/IUxT9QJ5LwxvIcDsKjNvBeUVd1RADoU=; b=k2GMxBpL4HrurskO3SGfmanjMlxM+iGg93h0RYJorWv5eFE9bKeTEaMOunZCt9goRw pVbIpKUElnJQ5+VSeLUqhCnsHvA5aE0/nAII2kxLucdnDFIdHa1eMDfOrwkzNGbmWcks mr0SlU/CaL7gn3vGBAH9Tj40f1PNDMcMFLfrCGHBlQVwfknaD714t27EGKKflXntwzPm YEXBI1ExDeNLdx7PRLoyFGifFYy0cCiFoSz9G+1iwtvYeTUOz4gG2YV6TMqqMauu+hcv 8NrhmM7UW1IzzpBZserhn147E8yUD1CGQChpUbFiRoMVS6PukXqkl+5m0STzpN07p9vi tplA== X-Gm-Message-State: AHQUAubF23XaIa96PrCClEAZgOm+FBrPOFs6yoZhwDp65jI3MvAbTlfO oqMEfRUMCeTQ8+PE+KA0EGqOqQ== X-Received: by 2002:a2e:7615:: with SMTP id r21-v6mr24318641ljc.131.1550763932024; Thu, 21 Feb 2019 07:45:32 -0800 (PST) Received: from linux-2.local (c-ae7b71d5.014-348-6c756e10.bbcust.telenor.se. [213.113.123.174]) by smtp.gmail.com with ESMTPSA id m73sm1316965lfa.65.2019.02.21.07.45.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Feb 2019 07:45:31 -0800 (PST) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Imre Kaloz , Krzysztof Halasa Cc: Linus Walleij , Marc Zyngier , Jason Cooper , Thomas Gleixner , devicetree@vger.kernel.org Subject: [PATCH 09/30 v2] irqchip: ixp4xx: Add DT bindings Date: Thu, 21 Feb 2019 16:44:37 +0100 Message-Id: <20190221154458.23763-10-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190221154458.23763-1-linus.walleij@linaro.org> References: <20190221154458.23763-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds device tree bindings for the IXP4xx interrupt controller. It's a standard 2-cell controller. Cc: Marc Zyngier Cc: Jason Cooper Cc: Thomas Gleixner Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Converted to use JSON yaml schema, why not. - Not keeping Rob's ACK because I think he wants to take a second look. --- .../intel,ixp4xx-interrupt.yaml | 57 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml -- 2.20.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml b/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml new file mode 100644 index 000000000000..f32c08f270d6 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2018 Linaro Ltd. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt/intel-ixp4xx-interrupt.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Intel IXP4xx XScale Networking Processors Interrupt Controller + +maintainers: + - Linus Walleij + +description: | + This interrupt controller is found in the Intel IXP4xx processors. + Some processors have 32 interrupts, some have up to 64 interrupts. + The exact number of interrupts is determined from the compatible + string. + + The distinct IXP4xx families with different interrupt controller + variations are IXP42x, IXP43x, IXP45x and IXP46x. Those four + families were the only ones to reach the developer and consumer + market. + +properties: + compatible: + oneOf: + - items: + - enum: + - intel,ixp42x-interrupt + - intel,ixp43x-interrupt + - intel,ixp45x-interrupt + - intel,ixp46x-interrupt + + reg: + description: The register bank for the interrupt controller. + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + description: The number of cells to define the interrupts. + with two cells specified in interrupt-controller/interrupts.txt + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +examples: + - | + intcon: interrupt-controller@c8003000 { + compatible = "intel,ixp43x-interrupt"; + reg = <0xc8003000 0x100>; + interrupt-controller; + #interrupt-cells = <2>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index a2fb67b75026..79f01af59a63 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1650,6 +1650,7 @@ M: Imre Kaloz M: Krzysztof Halasa L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained +F: Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml F: arch/arm/mach-ixp4xx/ F: drivers/clocksource/timer-ixp4xx.c F: drivers/gpio/gpio-ixp4xx.c