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[209.132.180.67]) by mx.google.com with ESMTP id d25si2089370pgd.88.2019.01.14.19.34.21; Mon, 14 Jan 2019 19:34:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KSJYPPQH; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728059AbfAODeU (ORCPT + 7 others); Mon, 14 Jan 2019 22:34:20 -0500 Received: from mail-pg1-f195.google.com ([209.85.215.195]:45631 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728058AbfAODeU (ORCPT ); Mon, 14 Jan 2019 22:34:20 -0500 Received: by mail-pg1-f195.google.com with SMTP id y4so584002pgc.12 for ; Mon, 14 Jan 2019 19:34:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xnTFjl+GiCKiqWScUNzvjAlPROFJTsMxFZH/vteR13U=; b=KSJYPPQHYCKO/l2r4rZBK4OAdG04CVUdVDmoYcG7ST+tf+myncWW+OHrcD5mY7CuX2 sT/s3qNmsbYtBTUWh+QzEosgr2c5GmOwDqEWij8yVx9KjN6u5USyPNUG9AEtX8yRrPCT wwPOWt59DLPBlsV9v8i//MAD42zuOUgs/tAPE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xnTFjl+GiCKiqWScUNzvjAlPROFJTsMxFZH/vteR13U=; b=m2YAS1nQGO0x2yPEphOTxD42p2rOWjG7A5bbKEOa+RM2invJmNXxwnuZgmt03WGHak YpyvSBKtojgn/SRVRiQhh0g2WVVDXiPHMatQKxMYLNrq0gfqTmG2ccspgqDkgVp7PRwx nqybSlG2uoxICVQGHSqSaqey4T1sPZMeu1FjG9+mzH0Vn4s1scFy0sdYPyT2G4N4Tg53 oX+BJAP9uOX6PxYDuuObPnwzlIdWcbUCX/1zOP5ILG97YDiw/M+4JgTojK8EAMEPD59/ jBgqpjBw4pGS+MjbBab5UX7mRfG4bSMWONUrG9NjVEpud7AdYZMRKCyrzr7BGndiSXvQ PeaQ== X-Gm-Message-State: AJcUukdfkec6qXg+p9ve4+UqM6l1XOr4A7pfqn8IbmTXd/bOotF1RjSc ay2by5v76LsVJWzd5NRGH/r7 X-Received: by 2002:a63:9712:: with SMTP id n18mr1777491pge.295.1547523260000; Mon, 14 Jan 2019 19:34:20 -0800 (PST) Received: from localhost.localdomain ([2409:4072:6084:4813:7cd6:42d1:f14c:3e90]) by smtp.gmail.com with ESMTPSA id s9sm2137023pgl.88.2019.01.14.19.34.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Jan 2019 19:34:19 -0800 (PST) From: Manivannan Sadhasivam To: sboyd@kernel.org, mturquette@baylibre.com, afaerber@suse.de, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Manivannan Sadhasivam , Edgar Bernardi Righi Subject: [PATCH v2 4/6] ARM: dts: Remove fake UART clock for S500 based SBCs Date: Tue, 15 Jan 2019 09:03:38 +0530 Message-Id: <20190115033340.25016-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190115033340.25016-1-manivannan.sadhasivam@linaro.org> References: <20190115033340.25016-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Since Actions Semi S500 SoC has gained support for Clock Management Unit in kernel, let's remove the fake UART clocks from Cubieboard6, Guitar and Sparky SBCs. Signed-off-by: Edgar Bernardi Righi Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/owl-s500-cubieboard6.dts | 7 ------- arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts | 7 ------- arch/arm/boot/dts/owl-s500-sparky.dts | 7 ------- 3 files changed, 21 deletions(-) -- 2.17.1 diff --git a/arch/arm/boot/dts/owl-s500-cubieboard6.dts b/arch/arm/boot/dts/owl-s500-cubieboard6.dts index 7c96c59b610d..c2b02895910c 100644 --- a/arch/arm/boot/dts/owl-s500-cubieboard6.dts +++ b/arch/arm/boot/dts/owl-s500-cubieboard6.dts @@ -25,12 +25,6 @@ device_type = "memory"; reg = <0x0 0x80000000>; }; - - uart3_clk: uart3-clk { - compatible = "fixed-clock"; - clock-frequency = <921600>; - #clock-cells = <0>; - }; }; &timer { @@ -39,5 +33,4 @@ &uart3 { status = "okay"; - clocks = <&uart3_clk>; }; diff --git a/arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts b/arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts index e610d49395d2..7ae34a23e320 100644 --- a/arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts +++ b/arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts @@ -18,15 +18,8 @@ chosen { stdout-path = "serial3:115200n8"; }; - - uart3_clk: uart3-clk { - compatible = "fixed-clock"; - clock-frequency = <921600>; - #clock-cells = <0>; - }; }; &uart3 { status = "okay"; - clocks = <&uart3_clk>; }; diff --git a/arch/arm/boot/dts/owl-s500-sparky.dts b/arch/arm/boot/dts/owl-s500-sparky.dts index c665ce8b88b4..9d8f7336bec0 100644 --- a/arch/arm/boot/dts/owl-s500-sparky.dts +++ b/arch/arm/boot/dts/owl-s500-sparky.dts @@ -25,12 +25,6 @@ device_type = "memory"; reg = <0x0 0x40000000>; /* 1 or 2 GiB */ }; - - uart3_clk: uart3-clk { - compatible = "fixed-clock"; - clock-frequency = <921600>; - #clock-cells = <0>; - }; }; &timer { @@ -39,5 +33,4 @@ &uart3 { status = "okay"; - clocks = <&uart3_clk>; };